Hardware architecture design and mapping of 'Fast Inverse Square Root' algorithm

The Fast Inverse Square Root algorithm has been used in 3D games of past for lighting and reflection calculations, because it offers up to four times performance gains. This paper presents a hardware implementation of the algorithm on an FPGA board by designing the complete architecture and successf...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	2014 International Conference on Advances in Electrical Engineering (ICAEE) S. 1 - 4
Hauptverfasser:	Zafar, Saad, Adapa, Raviteja
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 01.01.2014
Schlagworte:	0x5f3759df Algorithm design and analysis Clocks Computer architecture digital design Field programmable gate arrays fpga Hardware reciprocal root reconfigurable Software Software algorithms verilog
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!