Hardware architecture design and mapping of 'Fast Inverse Square Root' algorithm

The Fast Inverse Square Root algorithm has been used in 3D games of past for lighting and reflection calculations, because it offers up to four times performance gains. This paper presents a hardware implementation of the algorithm on an FPGA board by designing the complete architecture and successf...

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Bibliographic Details

Published in:	2014 International Conference on Advances in Electrical Engineering (ICAEE) pp. 1 - 4
Main Authors:	Zafar, Saad, Adapa, Raviteja
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.01.2014
Subjects:	0x5f3759df Algorithm design and analysis Clocks Computer architecture digital design Field programmable gate arrays fpga Hardware reciprocal root reconfigurable Software Software algorithms verilog
Online Access:	Get full text
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