Packet latency optimization for VOQs in variable-length packet switches

The virtual output queue (VOQ) has been used in input queued and input-output queued packet switches which require switch plane scheduling algorithms to achieve high throughput. However, existing scheduling algorithms such as iSLIP are designed for scheduling fixed size cell units and introduce unfa...

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Bibliographic Details
Published in:HPSR2002 : Workshop on High Performance Switching and Routing : proceedings : merging optical and IP technologies : May 26-29, 2002, Kobe, Japan pp. 77 - 82
Main Authors: Do, V.L., Yun, K.Y.
Format: Conference Proceeding
Language:English
Published: IEEE 2002
Subjects:
Algorithm design and analysis
Bars
Costs
Delay
Drives
Packet switching
Processor scheduling
Scheduling algorithm
Switches
Throughput
ISBN:488552184X, 9784885521843
Online Access:Get full text
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Summary:The virtual output queue (VOQ) has been used in input queued and input-output queued packet switches which require switch plane scheduling algorithms to achieve high throughput. However, existing scheduling algorithms such as iSLIP are designed for scheduling fixed size cell units and introduce unfairness in packet latency among VOQs if used for scheduling variable sized packet units. A self-optimized latency (SOL) scheduling algorithm is proposed to deal with scheduling variable-length packets. The SOL is a credit-based scheduling algorithm which assigns a credit flow for each VOQ. During operation, the SOL examines credit flows to grant access to VOQs through the switch plane. Moreover, the SOL also works in conjunction with an average packet length scheduling concept to modify credit flows based on size of packets transferred through the switch plane in order to increase fairness among VOQs. Simulation results show that the SOL scheduling algorithm in a switch plane significantly reduces the packet latency compared to iSLIP scheduling algorithm.
ISBN:488552184X
9784885521843
DOI:10.1109/HPSR.2002.1024212