A 280mV-to-1.1V 256b reconfigurable SIMD vector permutation engine with 2-dimensional shuffle in 22nm CMOS
Energy-efficient SIMD permutation operations are key for maximizing high-performance microprocessor vector datapath utilization in multimedia, graphics, and signal processing workloads [1-3]. A wide SIMD vector permutation engine is required to achieve high-throughput data rearrangement operations o...
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| Published in: | 2012 IEEE International Solid-State Circuits Conference pp. 178 - 180 |
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| Main Authors: | , , , , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
01.02.2012
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| Subjects: | |
| ISBN: | 1467303763, 9781467303767 |
| ISSN: | 0193-6530 |
| Online Access: | Get full text |
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