An Efficient FPGA Implementation of a Real-Time Image Generator Using Simultaneous Video Memory Read/Write Access and Fast Physical Addressing - Maamoun, Mountassar; Meraghni, Abdelhamid; Beguenane, Rachid (Fifth International Conference on MEMS, NANO, and Smart Systems : Dubai, UAE, 28-30 December 2009, 2009)
This paper presents an FPGA implementation of an advanced real-time architecture for generating video signals from microprocessor-based systems. This architecture is a hardware/software solution for high-speed image processing systems, which require a significant recording time and uses a reduced area of physical addressing of microprocessor-based systems. This solution investigates both the Fast Physical Addressing and the simultaneous video memory read-write system. This latter is ensured by a split of the hardware video memory in separate capacities and by association of a selecting circuit.