APA (7th ed.) Citation

Srinivasan, K., & Chatha, K. (2005). ISIS: A genetic algorithm based technique for custom on-chip interconnection network synthesis. 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design, 623-628. https://doi.org/10.1109/ICVD.2005.113

Chicago Style (17th ed.) Citation

Srinivasan, K., and K.S Chatha. "ISIS: A Genetic Algorithm Based Technique for Custom On-chip Interconnection Network Synthesis." 18th International Conference on VLSI Design Held Jointly with 4th International Conference on Embedded Systems Design 2005: 623-628. https://doi.org/10.1109/ICVD.2005.113.

MLA (9th ed.) Citation

Srinivasan, K., and K.S Chatha. "ISIS: A Genetic Algorithm Based Technique for Custom On-chip Interconnection Network Synthesis." 18th International Conference on VLSI Design Held Jointly with 4th International Conference on Embedded Systems Design, 2005, pp. 623-628, https://doi.org/10.1109/ICVD.2005.113.