Design space exploration and constrained multiobjective optimization for digital predistortion systems

In this paper, we develop new models and methods for exploring multidimensional design spaces associated with digital predistortion (DPD) systems. DPD systems are important components for power amplifier linearization in wireless communication transceivers. In contrast to conventional DPD implementa...

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Vydané v:Proceedings / IEEE International Conference on Application-Specific Systems, Architectures, and Processors s. 182 - 185
Hlavní autori: Lin Li, Ghazi, Amanullah, Boutellier, Jani, Anttila, Lauri, Valkama, Mikko, Bhattacharyya, Shuvra S.
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: IEEE 01.07.2016
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ISSN:2160-052X
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Shrnutí:In this paper, we develop new models and methods for exploring multidimensional design spaces associated with digital predistortion (DPD) systems. DPD systems are important components for power amplifier linearization in wireless communication transceivers. In contrast to conventional DPD implementation methods, which are focused on optimizing a single objective - most commonly, the adjacent channel power ratio (ACPR) - without systematically taking into account other relevant metrics, we consider DPD system implementation in a multiobjective optimization context. In our targeted multiobjective context, trade-offs among power consumption and multiple DPD performance metrics are jointly optimized subject to performance constraints imposed by the given modulation scheme. Through synthesis and simulation results, we demonstrate that DPD systems derived through our design space exploration techniques exhibit significantly improved trade-offs among multidimensional implementation criteria, including energy consumption, ACPR, and symbol error-rate. Additionally, we perform experiments using three different LTE modulation schemes, and we demonstrate that our multiobjective optimization approach significantly enhances system adaptivity in response to changes in the employed modulation scheme.
ISSN:2160-052X
DOI:10.1109/ASAP.2016.7760790