An efficient methodology for transaction-level design of multi-core h.264 video decoder

H.264 video decoder is a good choice for embedded instruments because of its higher compression ratio than MPEG2, as well as its higher requirements of run-time computational resource. Multi-core system is the future of the embedded processor design for its power efficiency and multi-thread parallel...

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Veröffentlicht in:2011 IEEE International Conference on Consumer Electronics (ICCE) S. 399 - 400
Hauptverfasser: Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 01.01.2011
Schlagworte:
Analytical models
Decoding
Design methodology
Multicore processing
Parallel programming
Time domain analysis
Time varying systems
ISBN:9781424487110, 1424487110
ISSN:2158-3994
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Abstract H.264 video decoder is a good choice for embedded instruments because of its higher compression ratio than MPEG2, as well as its higher requirements of run-time computational resource. Multi-core system is the future of the embedded processor design for its power efficiency and multi-thread parallelization, and can be used to fit well with the requirements for this decoder. To simulate and evaluate the performance of such application-specific multi-core systems effectively, a method based on the combination of TLM language (SystemC) and shared-memory parallel programming model (OpenMP) is given, and experiments show that it can effectively simulate the system in a short time and more importantly, it can be used to help analyze the efficiency of each task-parallelization strategy. After optimization, the speedup ratio for each slice decoding can get about 3.06 on average under 4-core multi-core systems.
AbstractList H.264 video decoder is a good choice for embedded instruments because of its higher compression ratio than MPEG2, as well as its higher requirements of run-time computational resource. Multi-core system is the future of the embedded processor design for its power efficiency and multi-thread parallelization, and can be used to fit well with the requirements for this decoder. To simulate and evaluate the performance of such application-specific multi-core systems effectively, a method based on the combination of TLM language (SystemC) and shared-memory parallel programming model (OpenMP) is given, and experiments show that it can effectively simulate the system in a short time and more importantly, it can be used to help analyze the efficiency of each task-parallelization strategy. After optimization, the speedup ratio for each slice decoding can get about 3.06 on average under 4-core multi-core systems.
Author Fei Qiao
Hui Wang
Bingbing Xia
Huazhong Yang
Author_xml – sequence: 1
  surname: Bingbing Xia
  fullname: Bingbing Xia
  email: xbb07@mails.tsinghua.edu.cn
  organization: Tsinghua Nat. Lab. for Inf. & Technol., Tsinghua Univ., Beijing, China
– sequence: 2
  surname: Fei Qiao
  fullname: Fei Qiao
  organization: Tsinghua Nat. Lab. for Inf. & Technol., Tsinghua Univ., Beijing, China
– sequence: 3
  surname: Huazhong Yang
  fullname: Huazhong Yang
  organization: Tsinghua Nat. Lab. for Inf. & Technol., Tsinghua Univ., Beijing, China
– sequence: 4
  surname: Hui Wang
  fullname: Hui Wang
  organization: Tsinghua Nat. Lab. for Inf. & Technol., Tsinghua Univ., Beijing, China
BookMark eNo1kNFqwjAYhTOmMHU-wNhNXqBd_jRpkkspbhOE3Qi7lDT5oxk1GW0n-PYT5q4OBz4OH2dOJiknJOQJWAnAzMumadYlZwClVJzXQt-ROQguhFbA-D1ZGqX_O7AJmXGQuqiMEVMy06KoRQVCPZD5MHwxBsZIMyOfq0QxhOgippGecDxmn7t8uNCQezr2Ng3WjTGnosMzdtTjEA-J5kBPP90YC5d7pMfyqkPP0WO-Ai577B_JNNhuwOUtF2T3ut4178X2423TrLZFNGwswDDPBQAPHqxzYJyWba2DMsFoIVEFHnSNxhqrtG2V9FpACy2TtrZC6mpBnv9mIyLuv_t4sv1lf_un-gVcyFbP
ContentType Conference Proceeding
DBID 6IE
6IH
CBEJK
RIE
RIO
DOI 10.1109/ICCE.2011.5722648
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan (POP) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP) 1998-present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISBN 1424487102
1424487129
9781424487103
1424487099
9781424487097
9781424487127
EndPage 400
ExternalDocumentID 5722648
Genre orig-research
GroupedDBID 6IE
6IF
6IH
6IL
6IN
AAWTH
ABLEC
ACGFS
ADZIZ
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
CHZPO
IEGSK
IJVOP
M43
OCL
RIE
RIL
RIO
ID FETCH-LOGICAL-i90t-190d24112fd1acc19c85b68f79f9845e7f2f86e9a9a78ab75d841b1b05a6a4583
IEDL.DBID RIE
ISBN 9781424487110
1424487110
ISSN 2158-3994
IngestDate Wed Aug 27 02:41:27 EDT 2025
IsPeerReviewed true
IsScholarly true
LCCN 84-643147
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i90t-190d24112fd1acc19c85b68f79f9845e7f2f86e9a9a78ab75d841b1b05a6a4583
PageCount 2
ParticipantIDs ieee_primary_5722648
PublicationCentury 2000
PublicationDate 2011-Jan.
PublicationDateYYYYMMDD 2011-01-01
PublicationDate_xml – month: 01
  year: 2011
  text: 2011-Jan.
PublicationDecade 2010
PublicationTitle 2011 IEEE International Conference on Consumer Electronics (ICCE)
PublicationTitleAbbrev ICCE
PublicationYear 2011
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0019959
ssj0000527452
Score 1.7554156
Snippet H.264 video decoder is a good choice for embedded instruments because of its higher compression ratio than MPEG2, as well as its higher requirements of...
SourceID ieee
SourceType Publisher
StartPage 399
SubjectTerms Analytical models
Decoding
Design methodology
Multicore processing
Parallel programming
Time domain analysis
Time varying systems
Title An efficient methodology for transaction-level design of multi-core h.264 video decoder
URI https://ieeexplore.ieee.org/document/5722648
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1JS8NAGB3a4kEvLq24MwePTk2azHaU0qKX0kPB3sqsWJBEaurv95tJmip4EXJIwiQTZgjv2977ELoX3CudW0mkc44ABFgirJeEWi5M5ij8Y3WzCT6bieVSzjvooeXCwCOx-MwNw2nM5dvSbEOoDJz3QPsUXdTlnNdcrTaeklDwr2grHRWYx8H0BUQTBEA435G6wEFIW62n3XWT7kwT-fgyHk9qZc9mtl9tVyLqTI__970naLCn7-F5C0ynqOOKM3T0Q3mwj16fCuyiegS8AddtpGOAHYMRi6t9E3HyHqqKsI2FHrj0OFYgkiB-id-GMC8ORL4SBgRy_GaAFtPJYvxMmh4LZC2TioA5YAHD05G3qTImlUZQzYTn0kuRU8f9yAvmpJKKC6U5tSJPdaoTqpgKKddz1CvKwl0gLDLNMm8MNeCiZI6B6ylYLpnQLuHK6kvUDyu0-qhVNFbN4lz9ffsaHdbR23DcoF612bpbdGC-qvXn5i5u_TdOT6fQ
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3LS8MwHA5zCurFxya-zcGjmc3aNMlRxsaGc-wwcLeRJw6kldn595ukXafgReihLWlTQsr3e33fD4B7Rq2QieaIG2OQgwCNmLYcEU2Zig1x_1jZbIJOJmw-59MGeKi5MO6RUHxmOv405PJ1rtY-VOacd0_7ZDtglyRJF5dsrTqiEhHnYZFaPMpzj73x6zCNIQfDyYbW5VwEXKs9ba6rhCeO-OOo1-uX2p7VfL8arwTcGRz974uPQXtL4IPTGppOQMNkp-Dwh_ZgC7w-ZdAE_Qj3Blg2kg4hdujMWFhs24ijd19XBHUo9YC5haEGEXn5S_jWcfNCT-XL3QBPj1-1wWzQn_WGqOqygJY8KpAzCLRDcdy1GgulMFeMyJRZyi1nCTHUdi1LDRdcUCYkJZolWGIZEZEKn3Q9A80sz8w5gCyWaWyVIso5KbFJnfPJ0oSnTJqICi0vQMuv0OKj1NFYVItz-fftO7A_nL2MF-PR5PkKHJSxXH9cg2axWpsbsKe-iuXn6jZsg29ABasX
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2011+IEEE+International+Conference+on+Consumer+Electronics+%28ICCE%29&rft.atitle=An+efficient+methodology+for+transaction-level+design+of+multi-core+h.264+video+decoder&rft.au=Bingbing+Xia&rft.au=Fei+Qiao&rft.au=Huazhong+Yang&rft.au=Hui+Wang&rft.date=2011-01-01&rft.pub=IEEE&rft.isbn=9781424487110&rft.issn=2158-3994&rft.spage=399&rft.epage=400&rft_id=info:doi/10.1109%2FICCE.2011.5722648&rft.externalDocID=5722648
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=2158-3994&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=2158-3994&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=2158-3994&client=summon