Finding biconnected componemts and computing tree functions in logarithmic parallel time
We propose a new algorithm for finding the blocks (biconnected components) of an undirected graph. A serial implementation runs in 0[n+m] time and space on a graph of n vertices and m edges. A parallel implmentation runs in 0[log n] time and 0[n+m] space using 0[n+m] processors on a concurrent-read,...
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| Published in: | 25th Annual Symposium onFoundations of Computer Science, 1984 pp. 12 - 20 |
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| Main Authors: | , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
1984
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| Subjects: | |
| ISBN: | 081860591X, 9780818605918 |
| ISSN: | 0272-5428 |
| Online Access: | Get full text |
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| Abstract | We propose a new algorithm for finding the blocks (biconnected components) of an undirected graph. A serial implementation runs in 0[n+m] time and space on a graph of n vertices and m edges. A parallel implmentation runs in 0[log n] time and 0[n+m] space using 0[n+m] processors on a concurrent-read, concurrent-write parallel RAM. An alternative implementation runs in 0[n/sup 2/p] time and 0[n/sup 2/] space using any number p ⩽ n/sup 2/log/sup 2/-n of processors, on a concurrent-read, exclusive-write parallel RAM. The latter algorithm has optimal speedup, assuming an adjacency matrix representation of the input. A general algorithmic technique which simplifies and improve computation of various functions on tress is introduced. This technique typically requires 0(log n) time using 0(n) space on an exclusive-read exclusive-write parallel RAM. |
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| AbstractList | We propose a new algorithm for finding the blocks (biconnected components) of an undirected graph. A serial implementation runs in 0[n+m] time and space on a graph of n vertices and m edges. A parallel implmentation runs in 0[log n] time and 0[n+m] space using 0[n+m] processors on a concurrent-read, concurrent-write parallel RAM. An alternative implementation runs in 0[n/sup 2/p] time and 0[n/sup 2/] space using any number p ⩽ n/sup 2/log/sup 2/-n of processors, on a concurrent-read, exclusive-write parallel RAM. The latter algorithm has optimal speedup, assuming an adjacency matrix representation of the input. A general algorithmic technique which simplifies and improve computation of various functions on tress is introduced. This technique typically requires 0(log n) time using 0(n) space on an exclusive-read exclusive-write parallel RAM. |
| Author | Vishkin, U. Tarjan, R.E. |
| Author_xml | – sequence: 1 givenname: R.E. surname: Tarjan fullname: Tarjan, R.E. organization: AT&T Bell Laboratories – sequence: 2 givenname: U. surname: Vishkin fullname: Vishkin, U. |
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| PublicationTitle | 25th Annual Symposium onFoundations of Computer Science, 1984 |
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| Snippet | We propose a new algorithm for finding the blocks (biconnected components) of an undirected graph. A serial implementation runs in 0[n+m] time and space on a... |
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| StartPage | 12 |
| SubjectTerms | Computational modeling Computer science Concurrent computing Parallel algorithms Phase change random access memory Random access memory Read-write memory Tree graphs US Department of Energy Writing |
| Title | Finding biconnected componemts and computing tree functions in logarithmic parallel time |
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