System level design and verification using a synchronous language

Synchronous languages such as Esterel, Lustre, Signal, and others were originally developed for safety-critical embedded software and compiled into C. They have recently been extended to hardware with new language features and compilers to RTL. Contrary to traditional HDL languages (Verilog, VHDL) a...

Celý popis

Podrobná bibliografia

Vydané v:	2003 IEEE/ACM International Computer-Aided Design s. 433 - 439
Hlavní autori:	Berry, G., Kishinevsky, M., Singh, S.
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	IEEE 2003
Predmet:	Automata Communication system control Formal verification Hardware design languages Permission Protocols Signal design Software safety Space exploration System-level design
ISBN:	9781581137620, 1581137621
On-line prístup:	Získať plný text
Tagy:	Pridať tag Žiadne tagy, Buďte prvý, kto otaguje tento záznam!