Irregular rate-compatible LDPC codes for capacity-approaching hybrid-ARQ schemes

In this paper, we describe the construction method of a family of irregular rate-compatible low-density parity-check (LDPC) codes by a combination of puncturing and extending techniques. In particular, we introduce a suitable structure for the extended parity-check matrices which preserves the struc...

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Bibliographic Details
Published in:Canadian Conference on Electrical and Computer Engineering 2004 (IEEE Cat. No.04CH37513) Vol. 1; pp. 303 - 306 Vol.1
Main Authors: Yazdani, M., Banihashemi, A.H.
Format: Conference Proceeding
Language:English
Published: IEEE 2004
Subjects:
Adaptive coding
Automatic repeat request
AWGN
Data communication
Decoding
Error correction codes
Parity check codes
Systems engineering and theory
Throughput
Turbo codes
ISBN:9780780382534, 0780382536
ISSN:0840-7789
Online Access:Get full text
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Summary:In this paper, we describe the construction method of a family of irregular rate-compatible low-density parity-check (LDPC) codes by a combination of puncturing and extending techniques. In particular, we introduce a suitable structure for the extended parity-check matrices which preserves the structure of LDPC codes during extensions. Based on this construction, a family of efficient rate-compatible linear-time encodable codes are generated from an optimized irregular mother code of rate 8/13 and information block length k=1024. The rates of the codes vary from 8/10 to 8/19 and employing them in a type-II hybrid ARQ scheme results in a throughput which is only 0.7 dB away from the Shannon limit. This improves over the existing schemes, based on turbo codes and LDPC codes, by up to 0.5 dB.
ISBN:9780780382534
0780382536
ISSN:0840-7789
DOI:10.1109/CCECE.2004.1345016