A graph based algorithm for optimal buffer insertion under accurate delay models

Buffer insertion is an efficient technique in interconnect optimization. This paper presents a graph based algorithm for optimal buffer insertion under accurate delay models. In our algorithm, a signal is accurately represented by a finite ramp which is characterized by two parameters, shift time an...

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Bibliographic Details

Published in:	Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001 pp. 535 - 539
Main Author:	Youxin Gao
Format:	Conference Proceeding
Language:	English
Published:	IEEE 2001
Subjects:	Delay effects Integrated circuit interconnections Polynomials Propagation delay Shortest path problem SPICE Time factors Transmission lines Very large scale integration Wire
ISBN:	9780769509938, 0769509932
ISSN:	1530-1591
Online Access:	Get full text
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