Parallel-and-vector implementation of the event-driven logic simulation algorithm on the Cray Y-MP supercomputer

The authors propose logic simulation techniques using parallel and vector machines to reduce the simulation time of large digital circuits. Three algorithms for logic simulation have been developed and implemented on the Cray Y-MP supercomputer, a general-purpose shared-memory parallel machine with...

Full description

Bibliographic Details

Published in:	Supercomputing, `92 pp. 444 - 452
Main Authors:	Bataineh, A., Ozguner, F.
Format:	Conference Proceeding
Language:	English
Published:	IEEE Comput. Soc. Press 1992
Subjects:	Circuit simulation Clocks Computational modeling Concurrent computing Digital circuits Discrete event simulation Hardware Logic circuits Logic design Supercomputers
ISBN:	9780818626302, 0818626305
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!