Algorithms and architectures for parallel processing 1997 3rd international conference, Melbourne, Australia, December 10-12 1997

This volume of proceedings describes the lower costs and higher degrees of integration of chip architecture which allow parallel processing. The impact on parallel processing algorithms is examined with solutions and the advantages of parallel processing for large computational problems are shown.

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Main Authors: Goscinski, Andrzej, Zhou, Wanlei, Hobbs, Michael
Format: eBook
Language:English
Published: World Scientific Publishing Co. Pte. Ltd 1997
Subjects:
ISBN:0780342291, 9780780342293
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Abstract This volume of proceedings describes the lower costs and higher degrees of integration of chip architecture which allow parallel processing. The impact on parallel processing algorithms is examined with solutions and the advantages of parallel processing for large computational problems are shown.
AbstractList This volume of proceedings describes the lower costs and higher degrees of integration of chip architecture which allow parallel processing. The impact on parallel processing algorithms is examined with solutions and the advantages of parallel processing for large computational problems are shown.
Author Zhou, Wanlei
Hobbs, Michael
Goscinski, Andrzej
Author_xml – sequence: 1
  fullname: Goscinski, Andrzej
– sequence: 2
  fullname: Zhou, Wanlei
– sequence: 3
  fullname: Hobbs, Michael
BookMark eNotj8tqwzAUBQVtoU2af9CyG4Mi6drSMjV9QaCFNmQZ9LiyVRTbSM6if19DO5uzm8OsyPUwDnhFVqxRTEjO9faWbEr5ZgsSgGm4I3KXujHHuT8XagZPTXZ9nNHNl4yFhjHTyWSTEiY65dFhKXHo7slNMKng5n_X5PD89NW-Vvv3l7d2t6-iAKgrbV0dgsOtB5BKQYDag-DcCxYYN9Zw1aBtfHAWlNQ1OuTees0b7nmwRqzJw583dtPFplj65fw05Xg2-ed0_PxoH5eUpU6LX6qSRe8
ContentType eBook
DBID WMAQA
DEWEY 004.35
DatabaseName World Scientific
DatabaseTitleList
DeliveryMethod fulltext_linktorsrc
Discipline Computer Science
ExternalDocumentID WSPCB0007809
GroupedDBID 6IE
6IK
AAJGR
AAWTH
ACGHX
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
J-X
OCL
PD6
RIE
WMAQA
ID FETCH-LOGICAL-i3556-9bc6ffce1d554885f56d5322d30f02aba287eb7dfcb58496ece2dbd9272d2fba3
ISBN 0780342291
9780780342293
IngestDate Mon Apr 07 05:01:03 EDT 2025
IsPeerReviewed false
IsScholarly false
LCCallNum QA76.58
LCCallNum_Ident QA76.58
Language English
LinkModel OpenURL
MergedId FETCHMERGED-LOGICAL-i3556-9bc6ffce1d554885f56d5322d30f02aba287eb7dfcb58496ece2dbd9272d2fba3
PageCount 792
ParticipantIDs igpublishing_primary_WSPCB0007809
ProviderPackageCode J-X
PublicationCentury 1900
PublicationDate 1997.
PublicationDateYYYYMMDD 1997-01-01
PublicationDate_xml – year: 1997
  text: 1997.
PublicationDecade 1990
PublicationYear 1997
Publisher World Scientific Publishing Co. Pte. Ltd
Publisher_xml – name: World Scientific Publishing Co. Pte. Ltd
SSID ssj0000455095
Score 1.7831863
Snippet This volume of proceedings describes the lower costs and higher degrees of integration of chip architecture which allow parallel processing. The impact on...
SourceID igpublishing
SourceType Publisher
SubjectTerms Computer programming
Multiprocessors--Programming
Parallel processing (Electronic computers)
SubjectTermsDisplay Computer programming
Multiprocessors--Programming
Parallel processing (Electronic computers)
Subtitle 1997 3rd international conference, Melbourne, Australia, December 10-12 1997
TableOfContents Algorithms and architectures for parallel processing : 1997 3rd international conference, Melbourne, Australia, December 10-12 1997 -- Preface -- Contents -- Part I: Introduction -- Chapter 1: Basic Issues of Algorithms and Architectures for Parallel Processing -- Chapter 2: Parallel Processing Prospects -- Part II: Architectures of Parallel Computer Systems -- Chapter 3: Routing in Parallel Computer Systems -- Chapter 4: Special-purpose Parallel Architectures -- Part III: Execution and Development Environments -- Chapter 5: Operating Environments -- Chapter 6: Scheduling -- Chapter 7: Parallelisation and Parallelising Compilers -- Chapter 8: Computing on Clusters of Workstations -- Part IV: Parallel Algorithms and Applications -- Chapter 9: Parallel Algorithms -- Chapter 10: Parallel Applications -- Chapter 11: Parallel Algorithms And Architectures For Neural Processing -- Chapter 12: Databases and parallel processing -- Appendices -- Appendix 1: Program Committee -- Appendix 2: Local Organising Committee -- Appendix 3: Organisers and Major Sponsors -- Appendix 4: List of Technical Reviewers -- Author Index -- Subject Index.
Title Algorithms and architectures for parallel processing
URI http://portal.igpublish.com/iglibrary/search/WSPCB0007809.html
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwtV3JTsMwELWgcODELnYFiVuVKnUapz6WCsQBqiKK6K3yWopCEnVBFV_P2EnTtCc4cMliRc7yIvvNeOYNQjc8JFKzIHADLZhZZvRchilzifSVTznBXFukH8NOp9nv024u-Tux5QTCOG7O5zT9V6ihDcA2qbN_gLvoFBrgGECHLcAO2zVGXJzm8cbRMAFT__0zk10uLxFY0YWqkfmOIhVV0yw7YDFrWXl8mAoXNaxNkOO3-lj6lJOZDcVjcaRGxX-QcD5ZD7yXeT5duOY-yEJ27DhiY5PK3q92Uqt2p6pWCjDKzE6gFUY5EGe1DddErJ9az63VZjtbvr1027eWkZh0y82QkCzZrnCIeSa_mgbWtZJ3X88VkorbGT3ZYVo8YYkJ9PbQljLpIftoQ8UHaHdRFMPJx8hD1FjC4AAMzgoMDsDgLGBwljAcodf7u177wc1LU7gjIGjEpVwQrYWqS6BjzWagAyIDGBul72kPM87AEFU8lFpwYHiUKKGw5JLiEEusOfOPUSVOYnWCHNYINBV1wYA9ga3sMQL9StgJrLDv41N0XX7nQZqpkAzKH_TsF9eco50l_heoMh3P1CXaFl_T0WR8ZbH4AZtlKQ4
linkProvider IEEE
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=book&rft.title=Algorithms+and+architectures+for+parallel+processing&rft.au=Goscinski%2C+Andrzej&rft.au=Zhou%2C+Wanlei&rft.au=Hobbs%2C+Michael&rft.date=1997-01-01&rft.pub=World+Scientific+Publishing+Co.+Pte.+Ltd&rft.isbn=9780780342293&rft.externalDBID=WMAQA&rft.externalDocID=WSPCB0007809
thumbnail_s http://cvtisr.summon.serialssolutions.com/2.0.0/image/custom?url=http%3A%2F%2Fportal.igpublish.com%2Figlibrary%2Famazonbuffer%2FWSPCB0007809_null_0_320.png