FPGA-Based Simulated Bifurcation Machine

Since many combinatorial optimization problems can be mapped onto ground-state search problems of Ising models, special-purpose machines for Ising problems have attracted intense attention. Simulated bifurcation (SB) is a recently proposed algorithm to solve these Ising problems. One of the remarkab...

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Published in:International Conference on Field-programmable Logic and Applications pp. 59 - 66
Main Authors: Tatsumura, Kosuke, Dixon, Alexander R., Goto, Hayato
Format: Conference Proceeding
Language:English
Published: IEEE 01.09.2019
Subjects:
Bifurcation
Combinatorial optimization
Computational complexity
Field programmable gate arrays
FPGA
GPU
Graphics processing units
HLS
Ising problem
Optimization
Oscillators
Parallel processing
simulated annealing
simulated bifurcation
ISSN:1946-1488
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Abstract Since many combinatorial optimization problems can be mapped onto ground-state search problems of Ising models, special-purpose machines for Ising problems have attracted intense attention. Simulated bifurcation (SB) is a recently proposed algorithm to solve these Ising problems. One of the remarkable features of SB is the high-degree parallelism underlying in the algorithm, providing an opportunity to solve the Ising problems very fast by massively parallel processing. In this work, we implement the SB algorithm on FPGAs by designing massively parallel custom circuits. We then compare the FPGA-based SB machines with a state-of-the-art machine called a coherent Ising machine (CIM), a highly optimized implementation of simulated annealing (SA), and GPU-based SB machines. SB machines with spin size of 2,048/4,096 (2K/4K) on an Arria10 GX1150 FPGA have 8,192 processing elements for the matrix-vector multiplication (MM) modules (the most computationally intensive part) and achieve computation throughput of 1,873/2,027 GMAC/s for the MM modules, outperforming 2K/4K SB machines on an Nvidia Tesla V100 GPU (113/183 GMAC/s). The 2K FPGA-SB solves all-to-all connected 2000-node MAX-CUT problem 14X (/124X) faster than the CIM (/the highly-optimized SA), with much better energy efficiency (288X better than the CIM).
AbstractList Since many combinatorial optimization problems can be mapped onto ground-state search problems of Ising models, special-purpose machines for Ising problems have attracted intense attention. Simulated bifurcation (SB) is a recently proposed algorithm to solve these Ising problems. One of the remarkable features of SB is the high-degree parallelism underlying in the algorithm, providing an opportunity to solve the Ising problems very fast by massively parallel processing. In this work, we implement the SB algorithm on FPGAs by designing massively parallel custom circuits. We then compare the FPGA-based SB machines with a state-of-the-art machine called a coherent Ising machine (CIM), a highly optimized implementation of simulated annealing (SA), and GPU-based SB machines. SB machines with spin size of 2,048/4,096 (2K/4K) on an Arria10 GX1150 FPGA have 8,192 processing elements for the matrix-vector multiplication (MM) modules (the most computationally intensive part) and achieve computation throughput of 1,873/2,027 GMAC/s for the MM modules, outperforming 2K/4K SB machines on an Nvidia Tesla V100 GPU (113/183 GMAC/s). The 2K FPGA-SB solves all-to-all connected 2000-node MAX-CUT problem 14X (/124X) faster than the CIM (/the highly-optimized SA), with much better energy efficiency (288X better than the CIM).
Author Tatsumura, Kosuke
Dixon, Alexander R.
Goto, Hayato
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  givenname: Alexander R.
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  fullname: Dixon, Alexander R.
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  givenname: Hayato
  surname: Goto
  fullname: Goto, Hayato
  organization: Corporate Research and Development Center, Toshiba Corporation
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Snippet Since many combinatorial optimization problems can be mapped onto ground-state search problems of Ising models, special-purpose machines for Ising problems...
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StartPage 59
SubjectTerms Bifurcation
Combinatorial optimization
Computational complexity
Field programmable gate arrays
FPGA
GPU
Graphics processing units
HLS
Ising problem
Optimization
Oscillators
Parallel processing
simulated annealing
simulated bifurcation
Title FPGA-Based Simulated Bifurcation Machine
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