Enforcing Deadlines for Skeleton-based Parallel Programming
High throughput applications with real-time guarantees are increasingly relevant. For these applications, parallelism must be exposed to meet deadlines. Directed Acyclic Graphs (DAGs) are a popular and very general application model that can capture any possible interaction among threads. However, w...
Saved in:
| Published in: | Proceedings / IEEE Real-Time and Embedded Technology and Applications Symposium pp. 188 - 199 |
|---|---|
| Main Authors: | , , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
01.04.2020
|
| Subjects: | |
| ISSN: | 2642-7346 |
| Online Access: | Get full text |
| Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
| Abstract | High throughput applications with real-time guarantees are increasingly relevant. For these applications, parallelism must be exposed to meet deadlines. Directed Acyclic Graphs (DAGs) are a popular and very general application model that can capture any possible interaction among threads. However, we argue that by constraining the application structure to a set of composable "skeletons", at the price of losing some generality w.r.t. DAGs, the following advantages are gained: (i) a finer model of the application enables tighter analysis, (ii) specialised scheduling policies are applicable, (iii) programming is simplified, (iv) specialised implementation techniques can be exploited transparently, and (v) the program can be automatically tuned to minimise resource usage while still meeting its hard deadlines. As a first step towards a set of real-time skeletons we conduct a case study with the job farm skeleton and the hard real-time XMOS xCore-200 microcontroller. We present an analytical framework for job farms that reduces the number of required cores by scheduling jobs in batches, while ensuring that deadlines are still met. Our experimental results demonstrate that batching reduces the minimum sustainable period by up to 22%, leading to a reduced number of required cores. The framework chooses the best parameters in 83% of cases and never selects parameters that cause deadline misses. Finally, we show that the overheads introduced by the skeleton abstraction layer are negligible. |
|---|---|
| AbstractList | High throughput applications with real-time guarantees are increasingly relevant. For these applications, parallelism must be exposed to meet deadlines. Directed Acyclic Graphs (DAGs) are a popular and very general application model that can capture any possible interaction among threads. However, we argue that by constraining the application structure to a set of composable "skeletons", at the price of losing some generality w.r.t. DAGs, the following advantages are gained: (i) a finer model of the application enables tighter analysis, (ii) specialised scheduling policies are applicable, (iii) programming is simplified, (iv) specialised implementation techniques can be exploited transparently, and (v) the program can be automatically tuned to minimise resource usage while still meeting its hard deadlines. As a first step towards a set of real-time skeletons we conduct a case study with the job farm skeleton and the hard real-time XMOS xCore-200 microcontroller. We present an analytical framework for job farms that reduces the number of required cores by scheduling jobs in batches, while ensuring that deadlines are still met. Our experimental results demonstrate that batching reduces the minimum sustainable period by up to 22%, leading to a reduced number of required cores. The framework chooses the best parameters in 83% of cases and never selects parameters that cause deadline misses. Finally, we show that the overheads introduced by the skeleton abstraction layer are negligible. |
| Author | Cole, Murray Metzger, Paul Fensch, Christian Aldinucci, Marco Bini, Enrico |
| Author_xml | – sequence: 1 givenname: Paul surname: Metzger fullname: Metzger, Paul organization: University of Edinburgh,School of Informatics,Edinburgh,UK,EH8 9AB – sequence: 2 givenname: Murray surname: Cole fullname: Cole, Murray organization: University of Edinburgh,School of Informatics,Edinburgh,UK,EH8 9AB – sequence: 3 givenname: Christian surname: Fensch fullname: Fensch, Christian organization: University of Edinburgh,School of Informatics,Edinburgh,UK,EH8 9AB – sequence: 4 givenname: Marco surname: Aldinucci fullname: Aldinucci, Marco organization: University of Torino,Department of Computer Science,Torino,Italy,10149 – sequence: 5 givenname: Enrico surname: Bini fullname: Bini, Enrico organization: University of Torino,Department of Computer Science,Torino,Italy,10149 |
| BookMark | eNotjMtKw0AUQEdRsK39Al3kBybeO48kg6tS6wMKFlvX5eZmpkSTiUy68e9b0NWBA-dMxVUcohfiHiFHBPfwsVtsTVWizRUoyAFAlhdi7soKS1WhNc6pSzFRhVGy1Ka4EdNx_ALQhXJ6Ih5XMQyJ23jInjw1XRv9mJ1Ntv32nT8OUdY0-ibbUKKu8122ScMhUd-fi1txHagb_fyfM_H5vNotX-X6_eVtuVjLVhl3lDqQhQK4VhCYfGPIUMPEoWIMZKypnSa2mlnZmk2NBTfWhcCKEINTeibu_r6t937_k9qe0u_eIWpwWp8AJrVLuQ |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1109/RTAS48715.2020.000-7 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume IEEE Xplore All Conference Proceedings IEEE Xplore IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library (IEL) url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| Discipline | Computer Science |
| EISBN | 9781728154992 1728154995 |
| EISSN | 2642-7346 |
| EndPage | 199 |
| ExternalDocumentID | 9113093 |
| Genre | orig-research |
| GroupedDBID | 23M 29O 6IE 6IK 6IL 6IN AAWTH ABLEC ACGFS ADZIZ ALMA_UNASSIGNED_HOLDINGS BEFXN BFFAM BGNUA BKEBE BPEOZ CBEJK CHZPO IEGSK IPLJI M43 OCL RIE RIL RNS |
| ID | FETCH-LOGICAL-i249t-3fa5060cb20fcaed4a4adcacf8c1fa454b93ac53cc25bc4b16cd59ffc2a11f923 |
| IEDL.DBID | RIE |
| ISICitedReferencesCount | 4 |
| ISICitedReferencesURI | http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000713963100014&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| IngestDate | Wed Aug 27 03:01:57 EDT 2025 |
| IsDoiOpenAccess | false |
| IsOpenAccess | true |
| IsPeerReviewed | false |
| IsScholarly | true |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-i249t-3fa5060cb20fcaed4a4adcacf8c1fa454b93ac53cc25bc4b16cd59ffc2a11f923 |
| OpenAccessLink | http://hdl.handle.net/2318/1741320 |
| PageCount | 12 |
| ParticipantIDs | ieee_primary_9113093 |
| PublicationCentury | 2000 |
| PublicationDate | 2020-April |
| PublicationDateYYYYMMDD | 2020-04-01 |
| PublicationDate_xml | – month: 04 year: 2020 text: 2020-April |
| PublicationDecade | 2020 |
| PublicationTitle | Proceedings / IEEE Real-Time and Embedded Technology and Applications Symposium |
| PublicationTitleAbbrev | RTAS |
| PublicationYear | 2020 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| SSID | ssj0036293 |
| Score | 2.1300294 |
| Snippet | High throughput applications with real-time guarantees are increasingly relevant. For these applications, parallelism must be exposed to meet deadlines.... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 188 |
| SubjectTerms | Analytical models Directed acyclic graph Microcontrollers Parallel processing Parallel programming Skeleton Throughput |
| Title | Enforcing Deadlines for Skeleton-based Parallel Programming |
| URI | https://ieeexplore.ieee.org/document/9113093 |
| WOSCitedRecordID | wos000713963100014&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NSwMxEB3a4sFT1Vb8JgePrt1skm6DJ1GLBynFVumtZGcTKGor_fD3O7PdVgQv3pawSWBC8t4kM_MALmNjHDpro5CmXFSbHBQrteOLfCYoxGELSZbXp7TX64xGtl-Bq20ujPe-CD7z1_xZvOXnM1zxVVmLNiY_3FWhmqbtda7W5tSlc9iqMjVOxrb1PLwdEBeXhlzAhKO34ui3gEqBH936_2beg-ZPIp7obyFmHyp-egD1jRKDKDdmA24eOKsI6R9xT4vG1HEhqEUM3ghWWCWY0SoXfTdn7ZR3HpTDsj6oRxNeug_Du8eolEWIJuQrLSMVHFcFxCyJAzqfa6ddjg5DB2Vw2ujMKodGISYmQ53JNubGhoCJkzIQoTuE2nQ29UcglDYqVUZZ4w2hWWYT1kdwWSdrc1EcPIYG22L8ua58MS7NcPJ38ynssrHXcS1nUFvOV_4cdvBrOVnML4rl-gZviJWR |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NTwIxEJ0gmugJFYzf9uDRle12y9J4MgrBiIQIGm6knW0TooLhw99vZ1kwJl68bZptm0zTvjftzDyAy1BKjVqpwCUJFdX2DorisaaLfCIonsNmkiyv7aTTqQ8GqluAq3UujLU2Cz6z1_SZveWnE1zQVVnVb0x6uNuATVLOUstsrdW5609iJfLkOB6q6nP_tufZOJfeCYwofisMfkuoZAjSLP1v7l2o_KTise4aZPagYMf7UFppMbB8a5bhpkF5Rej_Yfd-2Yg8zphvYb03DyykE0x4lbKunpJ6yjsNSoFZH75HBV6ajf5dK8iFEYKR95bmgXCa6gKiiUKH2qaxjnWKGl0dudOxjI0SGqVAjKTB2PAaplI5h5Hm3HlKdwDF8WRsD4GJWIpESKGklR7PjIpIIUGbuqlRWRw8gjLZYvi5rH0xzM1w_HfzBWy3-k_tYfuh83gCO2T4ZZTLKRTn04U9gy38mo9m0_Ns6b4BdTaY4A |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Proceedings+%2F+IEEE+Real-Time+and+Embedded+Technology+and+Applications+Symposium&rft.atitle=Enforcing+Deadlines+for+Skeleton-based+Parallel+Programming&rft.au=Metzger%2C+Paul&rft.au=Cole%2C+Murray&rft.au=Fensch%2C+Christian&rft.au=Aldinucci%2C+Marco&rft.date=2020-04-01&rft.pub=IEEE&rft.eissn=2642-7346&rft.spage=188&rft.epage=199&rft_id=info:doi/10.1109%2FRTAS48715.2020.000-7&rft.externalDocID=9113093 |