AQAF: An Architecture Quality Assurance Framework for Systems Modeled in AADL

Architecture engineering is essential to achieve dependability of critical embedded systems and affects large parts of the system life cycle. There is consequently little room for faults, which may cause substantial costs and devastating harm. Verification in architecture engineering should therefor...

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Published in:2016 12th International ACM SIGSOFT Conference on Quality of Software Architectures (QoSA) pp. 31 - 40
Main Authors: Johnsen, Andreas, Lundqvist, Kristina, Hanninen, Kaj, Pettersson, Paul, Torelm, Martin
Format: Conference Proceeding
Language:English
Published: IEEE 01.04.2016
Subjects:
AADL
Architecture-based verification framework
Automata
Computer architecture
Embedded systems
Model checking
Model-based testing
Protocols
Regression verification
Relays
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Abstract Architecture engineering is essential to achieve dependability of critical embedded systems and affects large parts of the system life cycle. There is consequently little room for faults, which may cause substantial costs and devastating harm. Verification in architecture engineering should therefore be holistically and systematically managed in the development of critical embedded systems, from requirements analysis and design to implementation and maintenance. In this paper, we address this problem by presenting AQAF: an Architecture Quality Assurance Framework for critical embedded systems modeled in the Architecture Analysis and Design Language (AADL). The framework provides a holistic set of verification techniques with a common formalism and semantic domain, architecture flow graphs and timed automata, enabling completely formal and automated verification processes covering virtually the entire life cycle. The effectiveness and efficiency of the framework are validated in a case study comprising a safety-critical train control system.
AbstractList Architecture engineering is essential to achieve dependability of critical embedded systems and affects large parts of the system life cycle. There is consequently little room for faults, which may cause substantial costs and devastating harm. Verification in architecture engineering should therefore be holistically and systematically managed in the development of critical embedded systems, from requirements analysis and design to implementation and maintenance. In this paper, we address this problem by presenting AQAF: an Architecture Quality Assurance Framework for critical embedded systems modeled in the Architecture Analysis and Design Language (AADL). The framework provides a holistic set of verification techniques with a common formalism and semantic domain, architecture flow graphs and timed automata, enabling completely formal and automated verification processes covering virtually the entire life cycle. The effectiveness and efficiency of the framework are validated in a case study comprising a safety-critical train control system.
Author Pettersson, Paul
Torelm, Martin
Johnsen, Andreas
Hanninen, Kaj
Lundqvist, Kristina
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  givenname: Kristina
  surname: Lundqvist
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  givenname: Kaj
  surname: Hanninen
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  givenname: Paul
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  givenname: Martin
  surname: Torelm
  fullname: Torelm, Martin
  email: martin.torelm@se.transport.bombardier.com
  organization: Propulsion & Converter Control Stand., Bombardier Transp. Sweden AB, Vasteras, Sweden
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SubjectTerms AADL
Architecture-based verification framework
Automata
Computer architecture
Embedded systems
Model checking
Model-based testing
Protocols
Regression verification
Relays
Title AQAF: An Architecture Quality Assurance Framework for Systems Modeled in AADL
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