Implementation of Image Averaging on DRRA and DiMArch Architectures

Image averaging is a technique used in image processing to reduce the noise present in an image. Image averaging is computationally intensive, particularly when dealing with images with high resolutions and large sizes. Thus, employing specialized hardware, such as field programmable gate arrays and...

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Veröffentlicht in:2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) S. 1 - 6
Hauptverfasser: Pudi, Dhilleswararao, Goudu, Vamsi, Boppu, Srinivas, Ratnu, Ritika, Hemani, Ahmed
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 28.08.2023
Schlagworte:
Coarse-grained reconfigurable architectures
Distributed memory architecture
Dynamically reconfigurable resource array
Image averaging
Image resolution
Logic gates
Memory architecture
Power dissipation
Program processors
Reconfigurable architectures
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Zusammenfassung:Image averaging is a technique used in image processing to reduce the noise present in an image. Image averaging is computationally intensive, particularly when dealing with images with high resolutions and large sizes. Thus, employing specialized hardware, such as field programmable gate arrays and coarse-grained reconfigurable architectures, becomes essential for efficient implementations, surpassing the capability of general-purpose processors. This paper proposes various approaches for implementing image averaging using two coarse-grain re-configurable fabrics: dynamically reconfigurable resource array and distributed memory architecture. Furthermore, we have discussed the implementation of image averaging on the target architecture for an input matrix of arbitrary size. Finally, the proposed approaches were compared with a field-programmable gate array-based implementation in terms of power dissipation. The experimental results show that the proposed approaches consume considerably less power than a field-programmable gate array-based implementation.
DOI:10.1109/SBCCI60457.2023.10261953