A High-Throughput QC-LDPC Decoder for Near-Earth Application

Turbo-like decoding message passing (TDMP) scheduling, which is suitable for quasi-cyclic low-density parity-check (QC-LDPC) codes, can obtain better decoding performance and shorter convergence time than two-phase message passing (TPMP). Normalized min-sum algorithm (NMSA) is used to reduce complex...

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Bibliographic Details
Published in:	International Conference on Digital Signal Processing proceedings pp. 1 - 4
Main Authors:	Li, Shixian, Zhang, Qichen, Chen, Yun, Zeng, Xiaoyang
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.11.2018
Subjects:	Clocks Computer architecture cyclic-shifted identity matrix Decoder architecture Decoding Hardware Manganese normalized min-sum algorithm (NMSA) Parity check codes quasi-cyclic low-density parity-check (QC-LDPC) Throughput turbo-decoding message-passing (TDMP)
ISSN:	2165-3577
Online Access:	Get full text
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Summary:	Turbo-like decoding message passing (TDMP) scheduling, which is suitable for quasi-cyclic low-density parity-check (QC-LDPC) codes, can obtain better decoding performance and shorter convergence time than two-phase message passing (TPMP). Normalized min-sum algorithm (NMSA) is used to reduce complexity of soft message processing unit. In this paper, we propose a (8176, 7154) QC-LDPC decoder for Consultative Committee for Space Data Systems (CCSDS) standard. In order to avoid memory access conflicts, two cyclic-shifted identity matrices forming a submatrix are processed individually. The decoder is synthesized by TSMC 65nm CMOS process and can achieve a throughput of 4.1Gb/s at clock frequency of 380MHz.
ISSN:	2165-3577
DOI:	10.1109/ICDSP.2018.8631641