Danger, J., Yashiro, R., Graba, T., Mathieu, Y., Si-Merabet, A., Sakiyama, K., . . . Nagata, M. (2018, August). Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology. 2018 21st Euromicro Conference on Digital System Design (DSD), 508-515. https://doi.org/10.1109/DSD.2018.00090
Citace podle Chicago (17th ed.)Danger, Jean-Luc, Risa Yashiro, Tarik Graba, Yves Mathieu, Abdelmalek Si-Merabet, Kazuo Sakiyama, Noriyuki Miura, a Makoto Nagata. "Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology." 2018 21st Euromicro Conference on Digital System Design (DSD) Aug. 2018: 508-515. https://doi.org/10.1109/DSD.2018.00090.
Citace podle MLA (9th ed.)Danger, Jean-Luc, et al. "Analysis of Mixed PUF-TRNG Circuit Based on SR-Latches in FD-SOI Technology." 2018 21st Euromicro Conference on Digital System Design (DSD), Aug. 2018, pp. 508-515, https://doi.org/10.1109/DSD.2018.00090.