A Scalable High-Bandwidth Architecture for Lossless Compression on FPGAs
Data compression techniques have been the subject of intense study over the past several decades due to exponential increases in the quantity of data stored and transmitted by computer systems. Compression algorithms are traditionally forced to make tradeoffs between throughput and compression quali...
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| Vydané v: | 2015 IEEE 23rd Annual International Symposium on Field-Programmable Custom Computing Machines s. 52 - 59 |
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| Hlavní autori: | , , , |
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| Jazyk: | English |
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01.05.2015
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| Abstract | Data compression techniques have been the subject of intense study over the past several decades due to exponential increases in the quantity of data stored and transmitted by computer systems. Compression algorithms are traditionally forced to make tradeoffs between throughput and compression quality (the ratio of original file size to compressed file size). FPGAs represent a compelling substrate for streaming applications such as data compression thanks to their capacity for deep pipelines and custom caching solutions. Unfortunately, data hazards in compression algorithms such as LZ77 inhibit the creation of deep pipelines without sacrificing some amount of compression quality. In this work we detail a scalable fully pipelined FPGA accelerator that performs LZ77 compression and static Huffman encoding at rates up to 5.6 GB/s. Furthermore, we explore tradeoffs between compression quality and FPGA area that allow the same throughput at a fraction of the logic utilization in exchange for moderate reductions in compression quality. Compared to recent FPGA compression studies, our emphasis on scalability gives our accelerator a 3.0× advantage in resource utilization at equivalent throughput and compression ratio. |
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| AbstractList | Data compression techniques have been the subject of intense study over the past several decades due to exponential increases in the quantity of data stored and transmitted by computer systems. Compression algorithms are traditionally forced to make tradeoffs between throughput and compression quality (the ratio of original file size to compressed file size). FPGAs represent a compelling substrate for streaming applications such as data compression thanks to their capacity for deep pipelines and custom caching solutions. Unfortunately, data hazards in compression algorithms such as LZ77 inhibit the creation of deep pipelines without sacrificing some amount of compression quality. In this work we detail a scalable fully pipelined FPGA accelerator that performs LZ77 compression and static Huffman encoding at rates up to 5.6 GB/s. Furthermore, we explore tradeoffs between compression quality and FPGA area that allow the same throughput at a fraction of the logic utilization in exchange for moderate reductions in compression quality. Compared to recent FPGA compression studies, our emphasis on scalability gives our accelerator a 3.0× advantage in resource utilization at equivalent throughput and compression ratio. |
| Author | Burger, Doug Joo-Young Kim Fowers, Jeremy Hauck, Scott |
| Author_xml | – sequence: 1 givenname: Jeremy surname: Fowers fullname: Fowers, Jeremy organization: Microsoft Res., Redmond, WA, USA – sequence: 2 surname: Joo-Young Kim fullname: Joo-Young Kim organization: Microsoft Res., Redmond, WA, USA – sequence: 3 givenname: Doug surname: Burger fullname: Burger, Doug organization: Microsoft Res., Redmond, WA, USA – sequence: 4 givenname: Scott surname: Hauck fullname: Hauck, Scott organization: Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA |
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| Snippet | Data compression techniques have been the subject of intense study over the past several decades due to exponential increases in the quantity of data stored... |
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| StartPage | 52 |
| SubjectTerms | Compression algorithms Computer architecture data compression Encoding Field programmable gate arrays FPGA Hardware hardware accelerator high throughput Huffman encoding LZ77 Pipelines Throughput Xpress |
| Title | A Scalable High-Bandwidth Architecture for Lossless Compression on FPGAs |
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