An automatic RTL compiler for high-throughput FPGA implementation of diverse deep convolutional neural networks

Convolutional neural networks (CNNs) are rapidly evolving and being applied to a broad range of applications. Given a specific application, an increasing challenge is to search the appropriate CNN algorithm and efficiently map it to the target hardware. The FPGA-based accelerator has the advantage o...

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Vydané v:	International Conference on Field-programmable Logic and Applications s. 1 - 8
Hlavní autori:	Ma, Yufei, Cao, Yu, Vrudhula, Sarma, Seo, Jae-sun
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	Ghent University 01.09.2017
Predmet:	Convolutional neural networks Field programmable gate arrays Hardware Libraries Optimization Runtime Schedules Software Software algorithms Topology
ISSN:	1946-1488
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