A framework for accelerating neuromorphic-vision algorithms on FPGAs

Implementations of neuromorphic algorithms are traditionally implemented on platforms which consume significant power, falling short of their biologically underpinnings. Recent improvements in FPGA technology have led to FPGAs becoming a platform in which these rapidly evolving algorithms can be imp...

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Bibliographic Details
Published in:2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) pp. 810 - 813
Main Authors: DeBole, M., Maashri, A. A., Cotter, M., Yu, C.-L, Chakrabarti, C., Narayanan, V.
Format: Conference Proceeding
Language:English
Published: IEEE 01.11.2011
Subjects:
Acceleration
Algorithm design and analysis
Classification algorithms
Computational modeling
Field programmable gate arrays
FPGA application mapping
FPGA programming
IP networks
Multi-FPGA partitioning
Neuromorphic vision algorithms
Neuromorphics
ISBN:1457713993, 9781457713996
ISSN:1092-3152
Online Access:Get full text
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Summary:Implementations of neuromorphic algorithms are traditionally implemented on platforms which consume significant power, falling short of their biologically underpinnings. Recent improvements in FPGA technology have led to FPGAs becoming a platform in which these rapidly evolving algorithms can be implemented. Unfortunately, implementing designs on FPGAs still prove challenging for nonexperts, limiting their use in the neuroscience domain. In this paper, a FPGA framework is presented which enables neuroscientists to compose multi-FPGA systems for a cortical object classification model. This is demonstrated by mapping this algorithm onto two distinct platforms providing speedups of up to ~28X over a reference CPU implementation.
ISBN:1457713993
9781457713996
ISSN:1092-3152
DOI:10.1109/ICCAD.2011.6105351