Scalable high-performance architecture for convolutional ternary neural networks on FPGA

Thanks to their excellent performances on typical artificial intelligence problems, deep neural networks have drawn a lot of interest lately. However, this comes at the cost of large computational needs and high power consumption. Benefiting from high precision at acceptable hardware cost on these d...

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Bibliographic Details

Published in:	International Conference on Field-programmable Logic and Applications pp. 1 - 7
Main Authors:	Prost-Boucle, Adrien, Bourge, Alban, Petrot, Frederic, Alemdar, Hande, Caldwell, Nicholas, Leroy, Vincent
Format:	Conference Proceeding
Language:	English
Published:	Ghent University 01.09.2017
Subjects:	Field programmable gate arrays Hardware Neural networks Neurons Parallel processing Random access memory Throughput
ISSN:	1946-1488
Online Access:	Get full text
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