Memristive Boltzmann machine: A hardware accelerator for combinatorial optimization and deep learning

The Boltzmann machine is a massively parallel computational model capable of solving a broad class of combinatorial optimization problems. In recent years, it has been successfully applied to training deep machine learning models on massive datasets. High performance implementations of the Boltzmann...

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Veröffentlicht in:Proceedings - International Symposium on High-Performance Computer Architecture S. 1 - 13
Hauptverfasser: Bojnordi, Mahdi Nazm, Ipek, Engin
Format: Tagungsbericht Journal Article
Sprache:Englisch
Veröffentlicht: IEEE 01.03.2016
Schlagworte:
Accelerators
Arrays
Belief networks
Combinatorial analysis
Computation
Computational modeling
Hardware
Learning
Machine learning
Optimization
Partitioning
Simulated annealing
Training
ISSN:2378-203X
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Zusammenfassung:The Boltzmann machine is a massively parallel computational model capable of solving a broad class of combinatorial optimization problems. In recent years, it has been successfully applied to training deep machine learning models on massive datasets. High performance implementations of the Boltzmann machine using GPUs, MPI-based HPC clusters, and FPGAs have been proposed in the literature. Regrettably, the required all-to-all communication among the processing units limits the performance of these efforts. This paper examines a new class of hardware accelerators for large-scale combinatorial optimization and deep learning based on memristive Boltzmann machines. A massively parallel, memory-centric hardware accelerator is proposed based on recently developed resistive RAM (RRAM) technology. The proposed accelerator exploits the electrical properties of RRAm to realize in situ, fine-grained parallel computation within memory arrays, thereby eliminating the need for exchanging data between the memory cells and the computational units. Two classical optimization problems, graph partitioning and boolean satisfiability, and a deep belief network application are mapped onto the proposed hardware. As compared to a multicore system, the proposed accelerator achieves 57x higher performance and 25x lower energy with virtually no loss in the quality of the solution to the optimization problems. The memristive accelerator is also compared against an RRAM based processing-in-memory (PIM) system, with respective performance and energy improvements of 6.89x and 5.2x.
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ISSN:2378-203X
DOI:10.1109/HPCA.2016.7446049