Transactional Memory Scheduling Using Machine Learning Techniques

Current shared memory multi-core systems require powerful software and hardware techniques to support the performance parallel computation and consistency simultaneously. The use of transactional memory results in significant improvement of performance by avoiding thread synchronization and locks ov...

Full description

Saved in:
Bibliographic Details
Published in:2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP) pp. 718 - 725
Main Authors: Assiri, Basem, Busch, Costas
Format: Conference Proceeding Journal Article
Language:English
Published: IEEE 01.02.2016
Subjects:
ISSN:2377-5750
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Abstract Current shared memory multi-core systems require powerful software and hardware techniques to support the performance parallel computation and consistency simultaneously. The use of transactional memory results in significant improvement of performance by avoiding thread synchronization and locks overhead. Also, transactions scheduling apparently influences the performance of transactional memory. In this paper, we study the fairness of transactions' scheduling using Lazy Snapshot Algorithm. The fairness of transactions' scheduling aims to balance between transactions types which are read-only and update transactions. Indeed, we support the fairness of the scheduling procedure by a machine learning technique. The machine learning techniques improve the fairness decisions according to transactions' history. The experiments in this paper show that the throughput of the Lazy Snapshot Algorithm is improved with a machine learning support. Indeed, our experiments show that the learning significantly affects the performance if the durations of update transactions are much longer than read-only ones. We also study several machine learning techniques to investigate the fairness decisions accuracy. In fact, K-Nearest Neighbor machine learning technique shows more accuracy and more suitability, for our problem, than Support Vector Machine Model and Hidden Markov Model.
AbstractList Current shared memory multi-core systems require powerful software and hardware techniques to support the performance parallel computation and consistency simultaneously. The use of transactional memory results in significant improvement of performance by avoiding thread synchronization and locks overhead. Also, transactions scheduling apparently influences the performance of transactional memory. In this paper, we study the fairness of transactions' scheduling using Lazy Snapshot Algorithm. The fairness of transactions' scheduling aims to balance between transactions types which are read-only and update transactions. Indeed, we support the fairness of the scheduling procedure by a machine learning technique. The machine learning techniques improve the fairness decisions according to transactions' history. The experiments in this paper show that the throughput of the Lazy Snapshot Algorithm is improved with a machine learning support. Indeed, our experiments show that the learning significantly affects the performance if the durations of update transactions are much longer than read-only ones. We also study several machine learning techniques to investigate the fairness decisions accuracy. In fact, K-Nearest Neighbor machine learning technique shows more accuracy and more suitability, for our problem, than Support Vector Machine Model and Hidden Markov Model.
Author Busch, Costas
Assiri, Basem
Author_xml – sequence: 1
  givenname: Basem
  surname: Assiri
  fullname: Assiri, Basem
  email: bassir1@lsu.edu
  organization: Louisana State Univ., Baton Rouge, LA, USA
– sequence: 2
  givenname: Costas
  surname: Busch
  fullname: Busch, Costas
  email: busch@csc.lsu.edu
  organization: Louisana State Univ., Baton Rouge, LA, USA
BookMark eNotjT1PwzAURQ0CibYwMbJkZEnxs53YHqtSPqRUVKKdoxfnhRqlTombof8eqrLcI10d3TtmV6ELxNg98CkAt0-r59VUcMinAi7YGFSupdE6F5dsJKTWaaYzfsPGMX5zzrUSdsRm6x5DRHfwXcA2WdKu64_Jp9tSPbQ-fCWbeMoluq0PlBSEfTgVa3Lb4H8GirfsusE20t0_J2zzsljP39Li4_V9PitSL7g5pOi0Q1m52hJgg7a2VQZWGSEMijpXjlPTZKLRQAKqxuQaSVVOgnOWC0Q5YY_n3X3fnX4P5c5HR22LgbohlmAg5wqEgT_14ax6Iir3vd9hfyy1UpkCKX8Bc6RYxg
CODEN IEEPAD
ContentType Conference Proceeding
Journal Article
DBID 6IE
6IL
CBEJK
RIE
RIL
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
DOI 10.1109/PDP.2016.21
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan All Online (POP All Online) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP All) 1998-Present
Computer and Information Systems Abstracts
Electronics & Communications Abstracts
Technology Research Database
ProQuest Computer Science Collection
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts – Academic
Computer and Information Systems Abstracts Professional
DatabaseTitle Technology Research Database
Computer and Information Systems Abstracts – Academic
Electronics & Communications Abstracts
ProQuest Computer Science Collection
Computer and Information Systems Abstracts
Advanced Technologies Database with Aerospace
Computer and Information Systems Abstracts Professional
DatabaseTitleList Technology Research Database

Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Computer Science
EISBN 1467387762
9781467387767
EISSN 2377-5750
EndPage 725
ExternalDocumentID 7445413
Genre orig-research
GroupedDBID 29N
29O
6IE
6IF
6IH
6IK
6IL
6IN
AAJGR
AAWTH
ABLEC
ACGFS
ADZIZ
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
CHZPO
IEGSK
IPLJI
M43
OCL
RIE
RIL
RNS
7SC
7SP
8FD
JQ2
L7M
L~C
L~D
ID FETCH-LOGICAL-i208t-ac7ca3bcd9e1afa9d9b51948228a2d64c0eff52f71e21bf867ae4bc31cc902aa3
IEDL.DBID RIE
ISICitedReferencesCount 1
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000381810900107&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
IngestDate Fri Jul 11 07:49:26 EDT 2025
Wed Aug 27 02:06:15 EDT 2025
IsPeerReviewed false
IsScholarly false
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i208t-ac7ca3bcd9e1afa9d9b51948228a2d64c0eff52f71e21bf867ae4bc31cc902aa3
Notes ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Conference-1
ObjectType-Feature-3
content type line 23
SourceType-Conference Papers & Proceedings-2
PQID 1816041281
PQPubID 23500
PageCount 8
ParticipantIDs ieee_primary_7445413
proquest_miscellaneous_1816041281
PublicationCentury 2000
PublicationDate 20160201
PublicationDateYYYYMMDD 2016-02-01
PublicationDate_xml – month: 02
  year: 2016
  text: 20160201
  day: 01
PublicationDecade 2010
PublicationTitle 2016 24th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing (PDP)
PublicationTitleAbbrev EMPDP
PublicationYear 2016
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0007429
ssj0001968140
Score 1.5898179
Snippet Current shared memory multi-core systems require powerful software and hardware techniques to support the performance parallel computation and consistency...
SourceID proquest
ieee
SourceType Aggregation Database
Publisher
StartPage 718
SubjectTerms Accuracy
Algorithms
Computer programs
Decisions
Fairness Values
Hidden Markov Model
Hidden Markov models
History
K-Nearest Neighbor
Lazy Snapshot Algorithm
Locks
Machine learning
Machine learning algorithms
Scheduling
Support Vector Machine
Support vector machines
Synchronism
Throughput
Training
Transactional Memory
Title Transactional Memory Scheduling Using Machine Learning Techniques
URI https://ieeexplore.ieee.org/document/7445413
https://www.proquest.com/docview/1816041281
WOSCitedRecordID wos000381810900107&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV07T8MwELZKxcBUoEWUl4zESNrYde14REDFQKsMBXWLLvYFKqEU9YHEv8d203aAhS1KnCg6P-7O_u77CLkBlC7nsiZyrgQiIfsYgbsTIRNcMVA5BrT767MajZLJRKc1cruthUHEAD7Djr8MZ_l2ZlZ-q6yrhOgLL1G7p5Ra12rt9lO09ORN21XYpXy6qsdjse6mD6nHccmOJwUNOiq_Ft_gUQaN__3LIWntSvNounU6R6SG5TFpbLQZaDVVm-RuvBMChw869IDab_f43bkWX4FOA1aADgOWEmlFs_pGxxtO10WLvAwex_dPUSWXEE15nCwjMMpALzdWI4MCtNW5C8-EiwAS4FYKE2NR9HmhGHKWF4lUgCI3PWaMjjlA74TUy1mJp4QWfZNYIa3hxn0gsS7tAddC-YDHAMc2aXqLZJ9rRoysMkabXG9MmrlR6o8eoMTZapG5OEJ6Zq-Enf396jk58N2zxkNfkPpyvsJLsm--ltPF_Cp09Q_Nrqr8
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV3NT8IwFG8ImugJFYz4WROPDmjp2vVoVIIRyA7TcFu69k1JzDB8mPjf25YBB714W7ZuWV4_3nvt7_1-CN0o4DbnMjqwrkQFjIcQKHsnAMKoIEpk4NHurwMxGkXjsYwr6HZTCwMAHnwGLXfpz_LNVC_dVllbMBYyJ1G7EzJGyapaa7ujIrmjb9qswzbpk2VFHunIdvwQOyQXbzlaUK-k8mv59T6lV_vf3xygxrY4D8cbt3OIKlAcodpanQGXk7WO7pKtFLj6wEMHqf22j9-tc3E16NijBfDQoykBl0SrbzhZs7rOG-il95jc94NSMCGY0E60CJQWWnUzbSQQlStpZGYDNGZjgEhRw5nuQJ6HNBcEKMnyiAsFLNNdorXsUKW6x6haTAs4QTgPdWQYN5pq-4HI2MRH2RbChTxaUWiiurNI-rnixEhLYzTR9dqkqR2n7vBBFTBdzlMbSXDH7RWR079fvUJ7_WQ4SAdPo-cztO-6aoWOPkfVxWwJF2hXfy0m89ml7_Yf3lyuQw
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2016+24th+Euromicro+International+Conference+on+Parallel%2C+Distributed%2C+and+Network-Based+Processing+%28PDP%29&rft.atitle=Transactional+Memory+Scheduling+Using+Machine+Learning+Techniques&rft.au=Assiri%2C+Basem&rft.au=Busch%2C+Costas&rft.date=2016-02-01&rft.pub=IEEE&rft.eissn=2377-5750&rft.spage=718&rft.epage=725&rft_id=info:doi/10.1109%2FPDP.2016.21&rft.externalDocID=7445413