Achieving Efficient QR Factorization by Algorithm-Architecture Co-design of Householder Transformation

Householder Transformation (HT) is a prime building block of widely used numerical linear algebra primitives such as QR factorization. Despite years of intense research on HT, there exists a scope to expose higher Instruction Level Parallelism in HT through algorithmic transforms. In this paper, we...

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Bibliographic Details
Published in:	2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) pp. 98 - 103
Main Authors:	Merchant, Farhad, Vatwani, Tarun, Chattopadhyay, Anupam, Raha, Soumyendu, Nandy, S. K., Narayan, Ranjani
Format:	Conference Proceeding Journal Article
Language:	English
Published:	IEEE 01.01.2016
Subjects:	Algorithm design and analysis Algorithms Co-design computation Computer architecture Conferences Exposure Factorization Heat treatment Householder transformations Linear algebra numerical linear algebra Optimization Parallel processing parallelism reconfigurable architectures Software algorithms Transformations (mathematics) Transforms
ISSN:	2380-6923
Online Access:	Get full text
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