CILP: An Arbitrary-bit Precision All-digital Compute-in-memory Solver for Integer Linear Programming Problems

Integer Linear Programming (ILP) is an NP-complete combinatorial optimization problem (COP), suggesting that it is computationally challenging to solve due to its exponentially increased operations with scaling. As shown in Fig. 1, The ILP is relevant in various real-world scenarios such as computat...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Veröffentlicht in:Proceedings of the Custom Integrated Circuits Conference S. 1 - 2
Hauptverfasser: Yang, Mengtian, Wang, Yipeng, Xie, Shanshan, Lo, Chieh-Pu, Wang, Meizhi, Oruganti, Sirish, Sehgal, Rishabh, Kulkarni, Jaydeep P.
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 21.04.2024
Schlagworte:
Common Information Model (computing)
Computer architecture
In-memory computing
Integer linear programming
Linear programming
Microprocessors
Software algorithms
ISSN:2152-3630
Online-Zugang:Volltext
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Integer Linear Programming (ILP) is an NP-complete combinatorial optimization problem (COP), suggesting that it is computationally challenging to solve due to its exponentially increased operations with scaling. As shown in Fig. 1, The ILP is relevant in various real-world scenarios such as computational biology [1], investment decision, automated driving, and electronic design automation [2]. An ILP solver aims to find a set of integer variables (x) to maximize a linear objective function (c\cdot x) , subject to a set of linear constraints (A\cdot x\leq b) . With the increasingly wide usage of ILP, various new solving algorithms [3] have been proposed, but the performance are limited by substantial memory access. ILP coefficients are fixed during solving, but software solvers on cache-register architectures frequently access cache to reload coefficients because of small register file size, causing up to a 10^{14}\mathrm{x} disparity between stored and accessed memory bits. FPGA [4] and AISC [5] accelerated solvers improve the speed by customized processing element (PE), but they still need frequent accesses to Block-RAM or scratch pad. Compute-in-memory (CIM) solutions are well-suited for ILP solving which has extremely high data reuse, but existing CIM DNN accelerators incur precision loss with hardware tradeoffs, which is unacceptable for ILP where the feasibility checking must be correct. Previous all-digital CIM COP solver for Boolean variables [6] uses a customized 6\mathrm{T} -6T{###} 3\mathrm{T} cell, limiting their adaptability to different technologies.
ISSN:2152-3630
DOI:10.1109/CICC60959.2024.10529041