Invited Paper: Software/Hardware Co-design for LLM and Its Application for Design Verification

The widespread adoption of Large Language Models (LLMs) is impeded by their demanding compute and memory resources. The first task of this paper is to explore optimization strategies to expedite LLMs, including quantization, pruning, and operation-level optimizations. One unique direction is to opti...

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Bibliographic Details
Published in:Proceedings of the ASP-DAC ... Asia and South Pacific Design Automation Conference pp. 435 - 441
Main Authors: Wan, Lily Jiaxin, Huang, Yingbing, Li, Yuhong, Ye, Hanchen, Wang, Jinghua, Zhang, Xiaofan, Chen, Deming
Format: Conference Proceeding
Language:English
Published: IEEE 22.01.2024
Subjects:
Design automation
Focusing
functional verification
Hardware
Large Language Models
Quantization (signal)
Software
software/hardware co-design
Source coding
Training
ISSN:2153-697X
Online Access:Get full text
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Summary:The widespread adoption of Large Language Models (LLMs) is impeded by their demanding compute and memory resources. The first task of this paper is to explore optimization strategies to expedite LLMs, including quantization, pruning, and operation-level optimizations. One unique direction is to optimize LLM inference through novel software/hardware co-design methods. Given the accelerated LLMs, the second task of this paper is to study LLMs' performance in the usage scenario of circuit design and verification. Specifically, we place a particular emphasis on functional verification. Through automated prompt engineering, we harness the capabilities of the established LLM, GPT-4, to generate High-Level Synthesis (HLS) designs with predefined errors based on 11 open-source synthesizable HLS benchmark suites. This dataset is a comprehensive collection of over 1000 function-level designs, and each of which is afflicted with up to 45 distinct combinations of defects injected into the source code. This dataset, named Chrysalis, expands upon what's available in current HLS error models, offering a rich resource for training to improve how LLMs debug code. The dataset can be accessed at: https://github.com/UIUC-ChenLab/Chrysalis-HLS.
ISSN:2153-697X
DOI:10.1109/ASP-DAC58780.2024.10473893