Dalorex: A Data-Local Program Execution and Architecture for Memory-bound Applications

Applications with low data reuse and frequent irregular memory accesses, such as graph or sparse linear algebra workloads, fail to scale well due to memory bottlenecks and poor core utilization. While prior work with prefetching, decoupling, or pipelining can mitigate memory latency and improve core...

Full description

Bibliographic Details

Published in:	Proceedings - International Symposium on High-Performance Computer Architecture pp. 718 - 730
Main Authors:	Orenes-Vera, Marcelo, Tureci, Esin, Wentzlaff, David, Martonosi, Margaret
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.02.2023
Subjects:	architecture bandwidth data-local Distributed graph near-memory network NoC parallel scalable sparse
ISSN:	2378-203X
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!