Hardware Implementation of Approximate Fixed-point Divider for Machine Learning Optimization Algorithm
Division operation is necessary for many applications, especially optimization algorithms for machine learning. Usually, a certain degree of loss is acceptable in calculating nonsignificant intermediate variables for a considerable speed improvement. This paper proposes a specialized divider to acce...
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| Vydáno v: | Asia Pacific Conference on Postgraduate Research in Microelectronics & Electronics (Online) s. 22 - 25 |
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| Jazyk: | angličtina |
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IEEE
11.11.2022
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| ISSN: | 2159-2160 |
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| Abstract | Division operation is necessary for many applications, especially optimization algorithms for machine learning. Usually, a certain degree of loss is acceptable in calculating nonsignificant intermediate variables for a considerable speed improvement. This paper proposes a specialized divider to accelerate machine learning optimization algorithm implementation on hardware. Inspired by the fast inverse square root algorithm, we designed a hardware implementation method according to the algorithm, which generates an approximate division result with conversion between floating-point and fixed-point numbers and multiplication. This paper includes three versions of divider: fastDiv_accuracy, a conventional design with a 35% less delay and minimal error compared to delay-minimized standard divider from the Synopsys DesignWare library; fastDiv_area, an area-oriented design with a 67% less delay and acceptable error compared to the standard divider constrained to the same area size; fastDiv_speed, the fastest design with a 54% less delay compared to delay-minimized standard divider. All these three versions can be applied in deploying optimization algorithms in FPGA or ASIC design on demand. |
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| AbstractList | Division operation is necessary for many applications, especially optimization algorithms for machine learning. Usually, a certain degree of loss is acceptable in calculating nonsignificant intermediate variables for a considerable speed improvement. This paper proposes a specialized divider to accelerate machine learning optimization algorithm implementation on hardware. Inspired by the fast inverse square root algorithm, we designed a hardware implementation method according to the algorithm, which generates an approximate division result with conversion between floating-point and fixed-point numbers and multiplication. This paper includes three versions of divider: fastDiv_accuracy, a conventional design with a 35% less delay and minimal error compared to delay-minimized standard divider from the Synopsys DesignWare library; fastDiv_area, an area-oriented design with a 67% less delay and acceptable error compared to the standard divider constrained to the same area size; fastDiv_speed, the fastest design with a 54% less delay compared to delay-minimized standard divider. All these three versions can be applied in deploying optimization algorithms in FPGA or ASIC design on demand. |
| Author | Zhang, Chun Wang, Zhihua Zhang, Weiyi Niu, Liting Wang, Ziqiang Han, Gandong |
| Author_xml | – sequence: 1 givenname: Gandong surname: Han fullname: Han, Gandong organization: School of Integrated Circuits, Tsinghua -University,Beijing,China – sequence: 2 givenname: Weiyi surname: Zhang fullname: Zhang, Weiyi organization: School of Integrated Circuits, Tsinghua -University,Beijing,China – sequence: 3 givenname: Liting surname: Niu fullname: Niu, Liting organization: School of Integrated Circuits, Tsinghua -University,Beijing,China – sequence: 4 givenname: Chun surname: Zhang fullname: Zhang, Chun organization: School of Integrated Circuits, Tsinghua -University,Beijing,China – sequence: 5 givenname: Zhihua surname: Wang fullname: Wang, Zhihua email: zhihua@tsinghua.edu.cn organization: Research Institute of Tsinghua University in Shenzhen,Shenzhen,China – sequence: 6 givenname: Ziqiang surname: Wang fullname: Wang, Ziqiang email: wangziq@tsinghua.edu.cn organization: Research Institute of Tsinghua University in Shenzhen,Shenzhen,China |
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| Snippet | Division operation is necessary for many applications, especially optimization algorithms for machine learning. Usually, a certain degree of loss is acceptable... |
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| SubjectTerms | Approximation algorithms Delays fast square root fixed-point division Hardware hardware acceleration Libraries Machine learning Machine learning algorithms optimization algorithm Throughput |
| Title | Hardware Implementation of Approximate Fixed-point Divider for Machine Learning Optimization Algorithm |
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