Memory-Efficient Hardware Performance Counters with Approximate-Counting Algorithms

Hardware performance counters are special registers on processors that track the hardware activities. While the performance counter data are useful for many applications, there are challenges in efficiently collecting many event statistics simultaneously, due to the limited number of performance cou...

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Vydané v:2021 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS) s. 226 - 228
Hlavní autori: Xu, Jingyi, Kim, Sehoon, Nikolic, Borivoje, Shao, Yakun Sophia
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: IEEE 01.03.2021
Predmet:
Approximate Counting Algorithms
Approximation algorithms
Hardware
Hardware Performance Counter
Heuristic algorithms
Memory management
Probability
Program processors
Sketching Algorithms
Software
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Abstract Hardware performance counters are special registers on processors that track the hardware activities. While the performance counter data are useful for many applications, there are challenges in efficiently collecting many event statistics simultaneously, due to the limited number of performance counters on chip. We propose an efficient hardware performance counter design that uses approximate-counting algorithms to improve the number of events tracked on-chip without incurring significant memory overhead. These counters are more memory efficient because they increment counts according to a dynamic probability and approximate the exact counts. Compared with multiplexed hardware performance counters, our approximate hardware counters have a statistically provable memory-accuracy trade-off and are entirely managed in hardware.
AbstractList Hardware performance counters are special registers on processors that track the hardware activities. While the performance counter data are useful for many applications, there are challenges in efficiently collecting many event statistics simultaneously, due to the limited number of performance counters on chip. We propose an efficient hardware performance counter design that uses approximate-counting algorithms to improve the number of events tracked on-chip without incurring significant memory overhead. These counters are more memory efficient because they increment counts according to a dynamic probability and approximate the exact counts. Compared with multiplexed hardware performance counters, our approximate hardware counters have a statistically provable memory-accuracy trade-off and are entirely managed in hardware.
Author Nikolic, Borivoje
Shao, Yakun Sophia
Xu, Jingyi
Kim, Sehoon
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  givenname: Jingyi
  surname: Xu
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  givenname: Sehoon
  surname: Kim
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  organization: University of California,Berkeley
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  givenname: Borivoje
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  givenname: Yakun Sophia
  surname: Shao
  fullname: Shao, Yakun Sophia
  organization: University of California,Berkeley
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Snippet Hardware performance counters are special registers on processors that track the hardware activities. While the performance counter data are useful for many...
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StartPage 226
SubjectTerms Approximate Counting Algorithms
Approximation algorithms
Hardware
Hardware Performance Counter
Heuristic algorithms
Memory management
Probability
Program processors
Sketching Algorithms
Software
Title Memory-Efficient Hardware Performance Counters with Approximate-Counting Algorithms
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