Prodigy: Improving the Memory Latency of Data-Indirect Irregular Workloads Using Hardware-Software Co-Design

Irregular workloads are typically bottlenecked by the memory system. These workloads often use sparse data representations, e.g., compressed sparse row/column (CSR/CSC), to conserve space at the cost of complicated, irregular traversals. Such traversals access large volumes of data and offer little...

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Veröffentlicht in:	Proceedings - International Symposium on High-Performance Computer Architecture S. 654 - 667
Hauptverfasser:	Talati, Nishil, May, Kyle, Behroozi, Armand, Yang, Yichen, Kaszyk, Kuba, Vasiladiotis, Christos, Verma, Tarunesh, Li, Lu, Nguyen, Brandon, Sun, Jiawen, Morton, John Magnus, Ahmadi, Agreen, Austin, Todd, O'Boyle, Michael, Mahlke, Scott, Mudge, Trevor, Dreslinski, Ronald
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 01.02.2021
Schlagworte:	and hardware prefetching compiler Data structures DRAM stalls graph processing hardware-software co-design Heuristic algorithms irregular workloads Layout Prefetching programmer annotations programming model Random access memory Semantics Software algorithms
ISSN:	2378-203X
Online-Zugang:	Volltext
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