Sapphire Rapids: The Next-Generation Intel Xeon Scalable Processor

Sapphire Rapids (SPR) is the next-generation Xeon® Processor with increased core count, greater than 100MB shared L3 cache, 8 DDR5 channels, 32GT/s PCIe/CXL lanes, 16GT/s UPI lanes and integrated accelerators supporting cryptography, compression and data streaming. The processor is made up of 4 die...

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Veröffentlicht in:Digest of technical papers - IEEE International Solid-State Circuits Conference Jg. 65; S. 44 - 46
Hauptverfasser: Nassif, Nevine, Munch, Ashley O., Molnar, Carleton L., Pasdast, Gerald, Lyer, Sitaraman V., Yang, Zibing, Mendoza, Oscar, Huddart, Mark, Venkataraman, Srikrishnan, Kandula, Sireesha, Marom, Rafi, Kern, Alexandra M., Bowhill, Bill, Mulvihill, David R., Nimmagadda, Srikanth, Kalidindi, Varma, Krause, Jonathan, Haq, Mohammad M., Sharma, Roopali, Duda, Kevin
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 20.02.2022
Schlagworte:
Conferences
Delays
Integrated circuit interconnections
Metals
Power system management
Routing
Transistors
ISSN:2376-8606
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Abstract Sapphire Rapids (SPR) is the next-generation Xeon® Processor with increased core count, greater than 100MB shared L3 cache, 8 DDR5 channels, 32GT/s PCIe/CXL lanes, 16GT/s UPI lanes and integrated accelerators supporting cryptography, compression and data streaming. The processor is made up of 4 die (Fig. 2.2.7) manufactured on Intel 7 process technology which features dual-poly-pitch SuperFin (SF) transistors with performance enhancements beyond 10SF,>25% additional MIM density over SuperMIM and a metal stack with a 400nm pitch routing layer optimized for global interconnects. This layer achieves ~30% delay reduction at the same signal density and is key for achieving the required latency. The core provides better performance via a programmable power management controller. New technologies include Intel Advanced Matrix Extensions (AMX), a matrix multiplication capability for acceleration of AI workloads and new virtualization technologies to address new and emerging workloads.
AbstractList Sapphire Rapids (SPR) is the next-generation Xeon® Processor with increased core count, greater than 100MB shared L3 cache, 8 DDR5 channels, 32GT/s PCIe/CXL lanes, 16GT/s UPI lanes and integrated accelerators supporting cryptography, compression and data streaming. The processor is made up of 4 die (Fig. 2.2.7) manufactured on Intel 7 process technology which features dual-poly-pitch SuperFin (SF) transistors with performance enhancements beyond 10SF,>25% additional MIM density over SuperMIM and a metal stack with a 400nm pitch routing layer optimized for global interconnects. This layer achieves ~30% delay reduction at the same signal density and is key for achieving the required latency. The core provides better performance via a programmable power management controller. New technologies include Intel Advanced Matrix Extensions (AMX), a matrix multiplication capability for acceleration of AI workloads and new virtualization technologies to address new and emerging workloads.
Author Mendoza, Oscar
Haq, Mohammad M.
Yang, Zibing
Nassif, Nevine
Huddart, Mark
Krause, Jonathan
Duda, Kevin
Molnar, Carleton L.
Sharma, Roopali
Kalidindi, Varma
Venkataraman, Srikrishnan
Kandula, Sireesha
Nimmagadda, Srikanth
Pasdast, Gerald
Mulvihill, David R.
Bowhill, Bill
Kern, Alexandra M.
Marom, Rafi
Munch, Ashley O.
Lyer, Sitaraman V.
Author_xml – sequence: 1
  givenname: Nevine
  surname: Nassif
  fullname: Nassif, Nevine
  organization: Intel,Hudson,MA
– sequence: 2
  givenname: Ashley O.
  surname: Munch
  fullname: Munch, Ashley O.
  organization: Intel,Hudson,MA
– sequence: 3
  givenname: Carleton L.
  surname: Molnar
  fullname: Molnar, Carleton L.
  organization: Intel,Hudson,MA
– sequence: 4
  givenname: Gerald
  surname: Pasdast
  fullname: Pasdast, Gerald
  organization: Intel,Santa Clara,CA
– sequence: 5
  givenname: Sitaraman V.
  surname: Lyer
  fullname: Lyer, Sitaraman V.
  organization: Intel,Santa Clara,CA
– sequence: 6
  givenname: Zibing
  surname: Yang
  fullname: Yang, Zibing
  organization: Intel,Hudson,MA
– sequence: 7
  givenname: Oscar
  surname: Mendoza
  fullname: Mendoza, Oscar
  organization: Intel,Hudson,MA
– sequence: 8
  givenname: Mark
  surname: Huddart
  fullname: Huddart, Mark
  organization: Intel,Hudson,MA
– sequence: 9
  givenname: Srikrishnan
  surname: Venkataraman
  fullname: Venkataraman, Srikrishnan
  organization: Intel,Bangalore,India
– sequence: 10
  givenname: Sireesha
  surname: Kandula
  fullname: Kandula, Sireesha
  organization: Intel,Hudson,MA
– sequence: 11
  givenname: Rafi
  surname: Marom
  fullname: Marom, Rafi
  organization: Intel,Haifa,Israel
– sequence: 12
  givenname: Alexandra M.
  surname: Kern
  fullname: Kern, Alexandra M.
  organization: Intel,Hudson,MA
– sequence: 13
  givenname: Bill
  surname: Bowhill
  fullname: Bowhill, Bill
  organization: Intel,Hudson,MA
– sequence: 14
  givenname: David R.
  surname: Mulvihill
  fullname: Mulvihill, David R.
  organization: Intel,Fort Collins,CO
– sequence: 15
  givenname: Srikanth
  surname: Nimmagadda
  fullname: Nimmagadda, Srikanth
  organization: Intel,Bangalore,India
– sequence: 16
  givenname: Varma
  surname: Kalidindi
  fullname: Kalidindi, Varma
  organization: Intel,Hudson,MA
– sequence: 17
  givenname: Jonathan
  surname: Krause
  fullname: Krause, Jonathan
  organization: Intel,Hudson,MA
– sequence: 18
  givenname: Mohammad M.
  surname: Haq
  fullname: Haq, Mohammad M.
  organization: Intel,Hudson,MA
– sequence: 19
  givenname: Roopali
  surname: Sharma
  fullname: Sharma, Roopali
  organization: Intel,Hudson,MA
– sequence: 20
  givenname: Kevin
  surname: Duda
  fullname: Duda, Kevin
  organization: Intel,Fort Collins,CO
BookMark eNotj81Kw0AURkdRsK19AhfmBRLv3Ezmx52GWgNFxVRwVyYzN3QkJiHJQt_egF2dj7P44CzZRdu1xNgth4RzMHdFWea5QMlFgoCYGJXOXp2xtVGaS5kJ1AB4zhaYKhlrCfKKLcfxCwAyI_WCPZa2749hoOjd9sGP99H-SNEL_Uzxlloa7BS6NiraiZrok-ZZOtvYqqHobegcjWM3XLPL2jYjrU9csY-nzT5_jnev2yJ_2MWBazHFaKoMaye0SH2FlUtrjha1h9pSBUqhIatA-8x4p1A67qVGFHNQ5mrIeLpiN_-_gYgO_RC-7fB7OCWnf27eTGQ
ContentType Conference Proceeding
DBID 6IE
6IH
CBEJK
RIE
RIO
DOI 10.1109/ISSCC42614.2022.9731107
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan (POP) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP) 1998-present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
EISBN 9781665428002
1665428007
EISSN 2376-8606
EndPage 46
ExternalDocumentID 9731107
Genre orig-research
GroupedDBID 6IE
6IF
6IH
6IK
6IL
6IM
6IN
AAJGR
AAWTH
ABLEC
ACGFS
ADZIZ
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
CHZPO
IEGSK
IJVOP
IPLJI
M43
OCL
RIE
RIL
RIO
RNS
ID FETCH-LOGICAL-i184t-29b52fc4843db2bc3f12a28d0faeb07729ea708d59dc726c1d682243115cf0513
IEDL.DBID RIE
IngestDate Wed Aug 27 02:24:26 EDT 2025
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i184t-29b52fc4843db2bc3f12a28d0faeb07729ea708d59dc726c1d682243115cf0513
PageCount 3
ParticipantIDs ieee_primary_9731107
PublicationCentury 2000
PublicationDate 2022-02-20
PublicationDateYYYYMMDD 2022-02-20
PublicationDate_xml – month: 02
  year: 2022
  text: 2022-02-20
  day: 20
PublicationDecade 2020
PublicationTitle Digest of technical papers - IEEE International Solid-State Circuits Conference
PublicationTitleAbbrev ISSCC
PublicationYear 2022
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0005968
Score 2.4955184
Snippet Sapphire Rapids (SPR) is the next-generation Xeon® Processor with increased core count, greater than 100MB shared L3 cache, 8 DDR5 channels, 32GT/s PCIe/CXL...
SourceID ieee
SourceType Publisher
StartPage 44
SubjectTerms Conferences
Delays
Integrated circuit interconnections
Metals
Power system management
Routing
Transistors
Title Sapphire Rapids: The Next-Generation Intel Xeon Scalable Processor
URI https://ieeexplore.ieee.org/document/9731107
Volume 65
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB5q8aAXH634JgePbrubfSTxaLHopRRXobeSxyz00i59-PvNpEur4MXbEAiBGZJ5ZL5vAB4q_zBy59NUZdBFWW6tv3OxiISrpMDcZGlswrAJMRrJyUSNW_C4w8IgYmg-wx6J4S_fLeyGSmV9GrOUEHT8QAixxWrt2zlUIZv-rSRW_beyHAwoPaC6Cee9ZuuvGSrBhQxP_nf4KXT3WDw23nmZM2jh_ByOf9AIduC51HVNRWb2ruuZWz0xb3w2opx2yypNymcBMMIm6MXSG4YgU6yBCSyWXfgcvnwMXqNmNkI08znZOuLK5LyymcxSZ7ixaZVwzaWLK40mppAZtYily5Wzghc2cQX1ixK3jq38RUwvoD1fzPESWGKL3GglXUHMMjKVWqQZFlpajj76yq6gQ9qY1lv6i2mjiOu_l2_giBQeUN_xLbTXyw3ewaH9Ws9Wy_tgs2-Ro5Z7
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1LSwMxEB5KFdSLj1bqOwePbrubzW6yHi2WFutS3Aq9lbwWemmXPvz9ZrZLq-DF2xAIgRmSeWS-bwAec_cwUuPS1ERZ47FIa3fnfO5xkwtuI8VCX5XDJniaiskkGdXgaYeFsdaWzWe2jWL5l28WeoOlsg6OWQoQOn4QMUaDLVpr39CRxKLq4Ar8pDPIsm4XEwSsnFDarjb_mqJSOpHe6f-OP4PmHo1HRjs_cw41O7-Akx9Egg14yWRRYJmZfMhiZlbPxJmfpJjVbnmlUf2khIyQiXVi5kyDoClSAQUWyyZ89l7H3b5XTUfwZi4rW3s0URHNNRMsNIoqHeYBlVQYP5dW-Rg0W8l9YaLEaE5jHZgYO0aRXUfn7iqGl1CfL-a2BSTQcaRkIkyM3DIiFJKHzMZSaGpd_MWuoIHamBZbAoxppYjrv5cf4Kg_fh9Oh4P07QaOUfklBty_hfp6ubF3cKi_1rPV8r603zeYo5nC
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Digest+of+technical+papers+-+IEEE+International+Solid-State+Circuits+Conference&rft.atitle=Sapphire+Rapids%3A+The+Next-Generation+Intel+Xeon+Scalable+Processor&rft.au=Nassif%2C+Nevine&rft.au=Munch%2C+Ashley+O.&rft.au=Molnar%2C+Carleton+L.&rft.au=Pasdast%2C+Gerald&rft.date=2022-02-20&rft.pub=IEEE&rft.eissn=2376-8606&rft.volume=65&rft.spage=44&rft.epage=46&rft_id=info:doi/10.1109%2FISSCC42614.2022.9731107&rft.externalDocID=9731107