On the Exploration of Convolutional Variational Autoencoders for Analog Integrated Circuit Post-Placement Performance Regression

The layout-aware synthesis of analog integrated circuits (ICs) still poses significant challenges, not only due to the inherent impact of parasitic structures and layout-dependent effects (LDEs) on the expected functional behavior, but also due to the computational effort required to conduct such op...

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Vydáno v:	International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (Online) s. 1 - 4
Hlavní autoři:	Almeida, Carlos, Oliveira, Marco, Martins, Ricardo
Médium:	Konferenční příspěvek
Jazyk:	angličtina
Vydáno:	IEEE 07.07.2025
Témata:	Analog integrated circuits Analytical models Autoencoders Computational modeling Design automation Electronic Design Automation Feature extraction Integrated circuit modeling Layout Machine Learning Optimization Performance metrics Performance Modeling Post-layout Performance
ISSN:	2575-4890
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