APA (7th ed.) Citation

Sunaga, K., Sugiura, K., & Matsutani, H. (2024, May 27). An FPGA-Based Accelerator for Graph Embedding using Sequential Training Algorithm. 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 148-154. https://doi.org/10.1109/IPDPSW63119.2024.00040

Chicago Style (17th ed.) Citation

Sunaga, Kazuki, Keisuke Sugiura, and Hiroki Matsutani. "An FPGA-Based Accelerator for Graph Embedding Using Sequential Training Algorithm." 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW) 27 May. 2024: 148-154. https://doi.org/10.1109/IPDPSW63119.2024.00040.

MLA (9th ed.) Citation

Sunaga, Kazuki, et al. "An FPGA-Based Accelerator for Graph Embedding Using Sequential Training Algorithm." 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW), 27 May. 2024, pp. 148-154, https://doi.org/10.1109/IPDPSW63119.2024.00040.