Designing energy-efficient approximate adders using parallel genetic algorithms
Approximate computing involves selectively reducing the number of transistors in a circuit to improve energy savings. Energy savings may be achieved at the cost of reduced accuracy for signal processing applications whereby constituent adder and multiplier circuits need not generate a precise output...
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| Published in: | SoutheastCon 2015 pp. 1 - 7 |
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| Main Authors: | , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
01.04.2015
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| Subjects: | |
| ISSN: | 1091-0050 |
| Online Access: | Get full text |
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