Designing energy-efficient approximate adders using parallel genetic algorithms

Approximate computing involves selectively reducing the number of transistors in a circuit to improve energy savings. Energy savings may be achieved at the cost of reduced accuracy for signal processing applications whereby constituent adder and multiplier circuits need not generate a precise output...

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Vydáno v:SoutheastCon 2015 s. 1 - 7
Hlavní autoři: Naseer, Adnan Aquib, Ashraf, Rizwan A., Dechev, Damian, DeMara, Ronald F.
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 01.04.2015
Témata:
adder
Adders
approximate computing
Approximation methods
delay
error distance
Genetic algorithms
inexact arithmetic units
low power
Mathematical model
Mirrors
parallel genetic algorithm
parallelism
power consumption
power reduction
process variation
Sociology
Statistics
variable accuracy
ISSN:1091-0050
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Abstract Approximate computing involves selectively reducing the number of transistors in a circuit to improve energy savings. Energy savings may be achieved at the cost of reduced accuracy for signal processing applications whereby constituent adder and multiplier circuits need not generate a precise output. Since the performance versus energy savings landscape is complex, we investigate the acceleration of the design of approximate adders using parallelized Genetic Algorithms (GAs). The fitness evaluation of each approximate adder is explored by the GA in a non-sequential fashion to automatically generate novel approximate designs within specified performance thresholds. This paper advances methods of parallelizing GAs and implements a new parallel GA approach for approximate multi-bit adder design. A speedup of approximately 1.6-fold is achieved using a quad-core Intel processor and results indicate that the proposed GA is able to find adders which consume 63:8% less energy than accurate adders.
AbstractList Approximate computing involves selectively reducing the number of transistors in a circuit to improve energy savings. Energy savings may be achieved at the cost of reduced accuracy for signal processing applications whereby constituent adder and multiplier circuits need not generate a precise output. Since the performance versus energy savings landscape is complex, we investigate the acceleration of the design of approximate adders using parallelized Genetic Algorithms (GAs). The fitness evaluation of each approximate adder is explored by the GA in a non-sequential fashion to automatically generate novel approximate designs within specified performance thresholds. This paper advances methods of parallelizing GAs and implements a new parallel GA approach for approximate multi-bit adder design. A speedup of approximately 1.6-fold is achieved using a quad-core Intel processor and results indicate that the proposed GA is able to find adders which consume 63:8% less energy than accurate adders.
Author DeMara, Ronald F.
Dechev, Damian
Ashraf, Rizwan A.
Naseer, Adnan Aquib
Author_xml – sequence: 1
  givenname: Adnan Aquib
  surname: Naseer
  fullname: Naseer, Adnan Aquib
  organization: Dept. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
– sequence: 2
  givenname: Rizwan A.
  surname: Ashraf
  fullname: Ashraf, Rizwan A.
  organization: Dept. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
– sequence: 3
  givenname: Damian
  surname: Dechev
  fullname: Dechev, Damian
  organization: Dept. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
– sequence: 4
  givenname: Ronald F.
  surname: DeMara
  fullname: DeMara, Ronald F.
  email: demara@mail.ucf.edu
  organization: Dept. of Electr. Eng. & Comput. Sci., Univ. of Central Florida, Orlando, FL, USA
BookMark eNotj9tKxDAYhCOs4J5eQG_yAq1_mjZpLqWuB1jshev1kqZ_aqSblqSC-_ZW3KuB4ZthZkUWfvBIyC2DlDFQ9--7qn5LM2BFKhnPlIQrsmK5kFxyALYgy5liCUABN2Qb4xfMrhRCcLkk9SNG13nnO4oeQ3dO0FpnHPqJ6nEMw4876QmpblsMkX7HP3LUQfc99rSbM5MzVPfdENz0eYobcm11H3F70TX5eNodqpdkXz-_Vg_7xDFZTIkpGpvl0IIwlillhZRKCGPQljmWmch52yBCYYwGpRo7_-KGNZkqyxZKVHxN7v57HSIexzCvDOfj5T__BQ70Uj0
ContentType Conference Proceeding
DBID 6IE
6IH
CBEJK
RIE
RIO
DOI 10.1109/SECON.2015.7132970
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan (POP) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP) 1998-present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Engineering
Statistics
EISBN 1467373001
9781467373005
EndPage 7
ExternalDocumentID 7132970
Genre orig-research
GroupedDBID 29O
6IE
6IF
6IH
6IK
6IL
6IN
AAWTH
ABLEC
ADZIZ
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
CHZPO
IEGSK
IJVOP
OCL
RIE
RIL
RIO
ID FETCH-LOGICAL-i175t-c5bf240d06cf199f677966ccef84e82643dbee05cca099bf1323c1b2988d08e93
IEDL.DBID RIE
ISICitedReferencesCount 1
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000371393800104&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
ISSN 1091-0050
IngestDate Wed Aug 27 02:15:53 EDT 2025
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i175t-c5bf240d06cf199f677966ccef84e82643dbee05cca099bf1323c1b2988d08e93
PageCount 7
ParticipantIDs ieee_primary_7132970
PublicationCentury 2000
PublicationDate 2015-April
PublicationDateYYYYMMDD 2015-04-01
PublicationDate_xml – month: 04
  year: 2015
  text: 2015-April
PublicationDecade 2010
PublicationTitle SoutheastCon 2015
PublicationTitleAbbrev SECON
PublicationYear 2015
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0001766637
ssj0020415
Score 1.9788383
Snippet Approximate computing involves selectively reducing the number of transistors in a circuit to improve energy savings. Energy savings may be achieved at the...
SourceID ieee
SourceType Publisher
StartPage 1
SubjectTerms adder
Adders
approximate computing
Approximation methods
delay
error distance
Genetic algorithms
inexact arithmetic units
low power
Mathematical model
Mirrors
parallel genetic algorithm
parallelism
power consumption
power reduction
process variation
Sociology
Statistics
variable accuracy
Title Designing energy-efficient approximate adders using parallel genetic algorithms
URI https://ieeexplore.ieee.org/document/7132970
WOSCitedRecordID wos000371393800104&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NTwIxEG2QeMCLChi_04NHC132o-1ZJZ6QRE24kd3uFElWMAsYf74zXQRMvHjbdJNmd6a786Z9b4axG4zYViMQFToNchFl2gptokhYG0vEz70QnPTNJtRgoEcjM6yx240WBgA8-Qw6dOnP8vO5XdFWWVdRV3SFCfqeUkml1drupygE4jvJFknP_UknMXtkLH8EM9J0n6lHILG64s56xl-tVXxk6R_-75mOWHsr0ePDTfA5ZjWYNdnBTnXBJmsQkKzqMLfY072nauANDl7uJ8AXj8DJua8r_jVF7AqcfkTlghMdfsKpLnhRQMFxlZHYkafFZF5Ol2_vizZ77T-83D2KdTMFMUWEsBQ2zhxG71wm1gXGuEQpzHSsBacjwBwjCvMMQMboUQSNmcPXCm2Q9YzWudRgwhNWn81ncEpsqDzN6EMPEL2keS9zOok0jaVOJs6dsRbZafxR1csYr010_vfwBWuQKyo2zCWrL8sVXLF9-4kWKq-9k78BinqmRw
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NT8JAEN0QNREvKmD8dg8eXdjSr-1ZJRgRScSEG2m3s0hSwRQw_nxnlgqYePHWbJNNO7PtvNl9b4axa4zYWiEQFSp2UuElSgsVeZ7Q2peIn5suGGmbTYTdrhoMol6J3ay0MABgyWdQp0t7lp9O9YK2yhohdUUPMUHfps5ZhVprvaMSIhTfSLdIfG7POonbI335I5mRUeOFugQSr8uvF3P-aq5iY0tr_39PdcBqa5Ee763CzyErwaTC9jbqC1ZYmaDkshJzlT3fWbIG3uBgBX8CbPkInJzbyuJfY0SvwOlXlM84EeJHnCqDZxlkHNcZyR15nI2m-Xj-9j6rsdfWff-2LYp2CmKMGGEutJ8YjN-pDLRxosgEYYi5jtZglAeYZXhumgBIH32KsDEx-FqudpJmpFQqFUTuEduaTCdwTHyoNE7oU3cQv8RpMzEq8BSNxUYGxpywKtlp-LGsmDEsTHT69_AV2233nzrDzkP38YyVyS1Lbsw525rnC7hgO_oTrZVfWod_A2OlqZA
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=SoutheastCon+2015&rft.atitle=Designing+energy-efficient+approximate+adders+using+parallel+genetic+algorithms&rft.au=Naseer%2C+Adnan+Aquib&rft.au=Ashraf%2C+Rizwan+A.&rft.au=Dechev%2C+Damian&rft.au=DeMara%2C+Ronald+F.&rft.date=2015-04-01&rft.pub=IEEE&rft.issn=1091-0050&rft.spage=1&rft.epage=7&rft_id=info:doi/10.1109%2FSECON.2015.7132970&rft.externalDocID=7132970
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/lc.gif&issn=1091-0050&client=summon
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/mc.gif&issn=1091-0050&client=summon
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=/sc.gif&issn=1091-0050&client=summon