Using module-level Evolvable Hardware approach in design of sequential logic circuits

In this study, we propose a module-level Evolvable Hardware (EHW) approach to design synchronous sequential circuits and minimize the circuit complexity (the number of logic gates and wires used). Firstly, we use Genetic Algorithm (GA) to implement state simplification and obtain near-optimal state...

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Bibliographic Details
Published in:2012 IEEE Congress on Evolutionary Computation pp. 1 - 8
Main Authors: Yanyun Tao, Jian Cao, Yuzhen Zhang, Jiajun Lin, Minglu Li
Format: Conference Proceeding
Language:English
Published: IEEE 01.06.2012
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ISBN:1467315109, 9781467315104
ISSN:1089-778X
Online Access:Get full text
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