Tao, Y., Cao, J., Zhang, Y., Lin, J., & Li, M. (2012, June). Using module-level Evolvable Hardware approach in design of sequential logic circuits. 2012 IEEE Congress on Evolutionary Computation, 1-8. https://doi.org/10.1109/CEC.2012.6256546
Citácia podle Chicago (17th ed.)Tao, Yanyun, Jian Cao, Yuzhen Zhang, Jiajun Lin, a Minglu Li. "Using Module-level Evolvable Hardware Approach in Design of Sequential Logic Circuits." 2012 IEEE Congress on Evolutionary Computation Jun. 2012: 1-8. https://doi.org/10.1109/CEC.2012.6256546.
Citácia podľa MLA (8th ed.)Tao, Yanyun, et al. "Using Module-level Evolvable Hardware Approach in Design of Sequential Logic Circuits." 2012 IEEE Congress on Evolutionary Computation, Jun. 2012, pp. 1-8, https://doi.org/10.1109/CEC.2012.6256546.
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