Accelerating Numerical Linear Algebra Kernels on a Scalable Run Time Reconfigurable Platform
Numerical Linear Algebra (NLA) kernels are at the heart of all computational problems. These kernels require hardware acceleration for increased throughput. NLA Solvers for dense and sparse matrices differ in the way the matrices are stored and operated upon although they exhibit similar computation...
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| Published in: | 2010 IEEE Computer Society Annual Symposium on VLSI pp. 161 - 166 |
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| Main Authors: | , , , , , , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
IEEE
01.07.2010
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| Subjects: | |
| ISBN: | 1424473217, 9781424473212 |
| ISSN: | 2159-3469 |
| Online Access: | Get full text |
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| Summary: | Numerical Linear Algebra (NLA) kernels are at the heart of all computational problems. These kernels require hardware acceleration for increased throughput. NLA Solvers for dense and sparse matrices differ in the way the matrices are stored and operated upon although they exhibit similar computational properties. While ASIC solutions for NLA Solvers can deliver high performance, they are not scalable, and hence are not commercially viable. In this paper, we show how NLA kernels can be accelerated on REDEFINE, a scalable runtime reconfigurable hardware platform. Compared to a software implementation, Direct Solver (Modified Faddeev's algorithm) on REDEFINE shows a 29X improvement on an average and Iterative Solver (Conjugate Gradient algorithm) shows a 15-20% improvement. We further show that solution on REDEFINE is scalable over larger problem sizes without any notable degradation in performance. |
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| ISBN: | 1424473217 9781424473212 |
| ISSN: | 2159-3469 |
| DOI: | 10.1109/ISVLSI.2010.65 |

