New approach of exploiting symmetry in SAT-based Boolean matching for FPGA technology mapping

Boolean matching is a key procedure in FPGA technology mapping. SAT-based Boolean matching provides a flexible solution for exploring various FPGA architectures. However, the computational complexity prohibits its application practically, inputs permutation is the bottleneck of SAT-based approach. I...

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Bibliographic Details

Published in:	2013 IEEE International Conference on Vehicular Electronics and Safety (ICVES) pp. 282 - 285
Main Authors:	Xiu-qin, Wang, Yang, Yang
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01.07.2013
Subjects:	Boolean functions Design automation Educational institutions Field programmable gate arrays FPGA Multiplexing Pins SAT-based symmetry Table lookup technology mapping
Online Access:	Get full text
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