Venieris, S. I., & Bouganis, C. (2017, September). Latency-driven design for FPGA-based convolutional neural networks. International Conference on Field-programmable Logic and Applications, 1-8. https://doi.org/10.23919/FPL.2017.8056828
Citace podle Chicago (17th ed.)Venieris, Stylianos I., a Christos-Savvas Bouganis. "Latency-driven Design for FPGA-based Convolutional Neural Networks." International Conference on Field-programmable Logic and Applications Sep. 2017: 1-8. https://doi.org/10.23919/FPL.2017.8056828.
Citace podle MLA (9th ed.)Venieris, Stylianos I., a Christos-Savvas Bouganis. "Latency-driven Design for FPGA-based Convolutional Neural Networks." International Conference on Field-programmable Logic and Applications, Sep. 2017, pp. 1-8, https://doi.org/10.23919/FPL.2017.8056828.