VHDL implementation of the lane detection algorithm

The aim of the following paper is to present a proposed VHDL implementation of a vision based lane detection algorithm. During the research several approaches to edge and line detection were analysed, which resulted in an optimal combination. The proposed algorithm is based on the Canny edge detecto...

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Vydané v:2008 15th International Conference on Mixed Design of Integrated Circuits and Systems : 19-21 June 2008 s. 581 - 584
Hlavní autori: Pankiewicz, P., Powiertowski, W., Roszak, G.
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: IEEE 01.06.2008
Predmet:
Canny edge detection
Computer architecture
Detectors
FPGA
Hough transform
Image edge detection
Lane detection
Latches
Mathematical models
PowerPC
Random access memory
Roads
Signal generators
Transforms
VHDL
ISBN:8392263278, 9788392263272
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Shrnutí:The aim of the following paper is to present a proposed VHDL implementation of a vision based lane detection algorithm. During the research several approaches to edge and line detection were analysed, which resulted in an optimal combination. The proposed algorithm is based on the Canny edge detector and the linear Hough transform for line detection. The system had been pre-developed using the Matlab environment, followed by a synthesizable hardware description using VHDL. A wide range of testing procedures for structural and behavioural verification was designed. The presented evaluation of both the hardware and software simulations, as well as the synthesis results proved high capabilities of the designed architecture.
ISBN:8392263278
9788392263272