Loop Parallelization Algorithm for Specific Case of Loop-carried Dependence for Hardware Compilation

This paper describes algorithm to parallelize loop with loop-carried dependency between iterations in the specific case. This algorithm can be used for hardware compilation and allows increase performance of synthesized devices. The paper represents case and condition when the suggested algorithm sh...

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Veröffentlicht in:2007 IEEE Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications S. 265 - 267
Hauptverfasser: Sadykhov, R.Kh, Uvarov, A.A.
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 01.09.2007
Schlagworte:
Application software
Arithmetic Coder
Concurrent computing
Conferences
Data acquisition
Digital arithmetic
Digital circuits
Hardware
Hardware Compilation
Informatics
Loop-Carried Dependence
Optimizing compilers
Parallel processing
Parallelism Extraction
ISBN:9781424413478, 1424413478
Online-Zugang:Volltext
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Beschreibung
Zusammenfassung:This paper describes algorithm to parallelize loop with loop-carried dependency between iterations in the specific case. This algorithm can be used for hardware compilation and allows increase performance of synthesized devices. The paper represents case and condition when the suggested algorithm should be applied and introduces criterion for algorithm parameters chosen to keep up optimal balance between performance and hardware overhead. The hardware realization of ZP-coder on the base of investigated algorithm and its comparison with analogical devices are also represented.
ISBN:9781424413478
1424413478
DOI:10.1109/IDAACS.2007.4488418