Programming and Timing Analysis of Parallel Programs on Multicores

Multicore processors provide better power-performance trade-offs compared to single-core processors. Consequently, they are rapidly penetrating market segments which are both safety critical and hard real-time in nature. However, designing time-predictable embedded applications over multicores remai...

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Veröffentlicht in:Proceedings / International Conference on Application of Concurrency to System Design S. 160 - 169
Hauptverfasser: Yip, Eugene, Roop, Partha S., Biglari-Abhari, Morteza, Girault, Alain
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 01.07.2013
Schlagworte:
Instruction sets
Multicore processing
parallel programming
Robots
Semantics
Synchronization
synchronous languages
WCET analysis
ISSN:1550-4808
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Zusammenfassung:Multicore processors provide better power-performance trade-offs compared to single-core processors. Consequently, they are rapidly penetrating market segments which are both safety critical and hard real-time in nature. However, designing time-predictable embedded applications over multicores remains a considerable challenge. This paper proposes the ForeC language for the deterministic parallel programming of embedded applications on multicores. ForeC extends C with a minimal set of constructs adopted from synchronous languages. To guarantee the worst-case performance of ForeC programs, we offer a very precise reachability-based timing analyzer. To the best of our knowledge, this is the first attempt at the efficient and deterministic parallel programming of multicores using a synchronous C-variant. Experimentation with large multicore programs revealed an average over-estimation of only 2% for the computed worst-case execution times (WCETs). By reducing our representation of the program's state-space, we reduced the analysis time for the largest program (with 43, 695 reachable states) by a factor of 342, to only 7 seconds.
ISSN:1550-4808
DOI:10.1109/ACSD.2013.19