Performing scheduling and storage optimization simultaneously using genetic algorithms

This paper presents a method for performing scheduling and allocation of functional units simultaneously with storage optimization in high-level synthesis using genetic algorithms. The method involves augmenting a standard CDFG with storage operations and scheduling these operations on available sto...

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Veröffentlicht in:Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems S. 284 - 287
Hauptverfasser: Torbey, E., Knight, J.
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: IEEE 1998
Schlagworte:
Biological cells
Circuit simulation
Circuit synthesis
Cost function
Genetic algorithms
High level synthesis
Integrated circuit interconnections
Optimization methods
Registers
Simulated annealing
ISBN:9780818689147, 0818689145
Online-Zugang:Volltext
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Zusammenfassung:This paper presents a method for performing scheduling and allocation of functional units simultaneously with storage optimization in high-level synthesis using genetic algorithms. The method involves augmenting a standard CDFG with storage operations and scheduling these operations on available storage units. The resulting synthesis tool is flexible and can support any type of storage unit from registers, to multi-port register files and memories. Results on typical circuits and benchmarks prove the flexibility and performance of this technique.
ISBN:9780818689147
0818689145
DOI:10.1109/MWSCAS.1998.759488