A CMOS mixed signal simultaneous bidirectional signaling I/O
Limited pin counts and achievable bandwidth have become a major limitation to achievable I/O speed of integrated circuits. Previously published current-mode techniques enable I/O circuits to achieve simultaneous bidirectional signaling. This maximizes data rate with minimal I/O power dissipation and...
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| Vydáno v: | Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems s. 37 - 40 |
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| Hlavní autoři: | , |
| Médium: | Konferenční příspěvek |
| Jazyk: | angličtina |
| Vydáno: |
IEEE
1998
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| ISBN: | 9780818689147, 0818689145 |
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| Abstract | Limited pin counts and achievable bandwidth have become a major limitation to achievable I/O speed of integrated circuits. Previously published current-mode techniques enable I/O circuits to achieve simultaneous bidirectional signaling. This maximizes data rate with minimal I/O power dissipation and minimal I/O pin count. A new I/O circuit fabricated in 2 /spl mu/m CMOS is described in this work which is capable of handling both analog and digital data signals in a simultaneous bidirectional manner. Mixed-signal operation is achieved by using an analog transmitter to steer current in and out of a transmission line with a receiver amplifier recovering the receive signal. |
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| AbstractList | Limited pin counts and achievable bandwidth have become a major limitation to achievable I/O speed of integrated circuits. Previously published current-mode techniques enable I/O circuits to achieve simultaneous bidirectional signaling. This maximizes data rate with minimal I/O power dissipation and minimal I/O pin count. A new I/O circuit fabricated in 2 /spl mu/m CMOS is described in this work which is capable of handling both analog and digital data signals in a simultaneous bidirectional manner. Mixed-signal operation is achieved by using an analog transmitter to steer current in and out of a transmission line with a receiver amplifier recovering the receive signal. |
| Author | Jackson, S.A. Blalock, B.J. |
| Author_xml | – sequence: 1 givenname: S.A. surname: Jackson fullname: Jackson, S.A. organization: Microsyst. Prototyping Lab., Mississippi State Univ., MS, USA – sequence: 2 givenname: B.J. surname: Blalock fullname: Blalock, B.J. |
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| DOI | 10.1109/MWSCAS.1998.759430 |
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| PublicationTitle | Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems |
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| Snippet | Limited pin counts and achievable bandwidth have become a major limitation to achievable I/O speed of integrated circuits. Previously published current-mode... |
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| StartPage | 37 |
| SubjectTerms | Bandwidth Crosstalk Differential amplifiers Low voltage Power dissipation Power supplies Power transmission lines Prototypes Transceivers Transmitters |
| Title | A CMOS mixed signal simultaneous bidirectional signaling I/O |
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