An algorithm driven architecture for a lossless image compression scheme based on multiplicative autoregressive models

We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation...

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Vydané v:Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems s. 395 - 398
Hlavní autori: Chande, S.B., Das, M., Ganesan, S.
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: IEEE 1998
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ISBN:9780818689147, 0818689145
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Shrnutí:We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation of the compression algorithm.
ISBN:9780818689147
0818689145
DOI:10.1109/MWSCAS.1998.759514