An algorithm driven architecture for a lossless image compression scheme based on multiplicative autoregressive models

We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation...

Full description

Saved in:
Bibliographic Details
Published in:Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems pp. 395 - 398
Main Authors: Chande, S.B., Das, M., Ganesan, S.
Format: Conference Proceeding
Language:English
Published: IEEE 1998
Subjects:
ISBN:9780818689147, 0818689145
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Abstract We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation of the compression algorithm.
AbstractList We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the block-based compression algorithm. Various schemes of implementation of the architecture are discussed and compared with the sequential implementation of the compression algorithm.
Author Chande, S.B.
Das, M.
Ganesan, S.
Author_xml – sequence: 1
  givenname: S.B.
  surname: Chande
  fullname: Chande, S.B.
  organization: Dept. of Comput. Sci. & Eng., Oakland Univ., Rochester, MI, USA
– sequence: 2
  givenname: M.
  surname: Das
  fullname: Das, M.
– sequence: 3
  givenname: S.
  surname: Ganesan
  fullname: Ganesan, S.
BookMark eNotkNtKAzEQhgMqqLUv0Ku8QGuym-NlKR4KFS-qeFmyybSNZDclyRZ8e4N1bobv5-djmHt0PcQBEJpRsqCU6Me3r-1quV1QrdVCcs0pu0JTLRVRVAmlKZO3aJrzN6nDeENIe4fOywGbcIjJl2OPXfJnqEGyR1_AljEB3seEDQ4x5wA5Y9-bA2Ab-1Oq6OOAsz1CD7gzGRyu3I-h-FPw1pRqw2YsMcHhr12xjw5CfkA3exMyTP_3BH0-P32sXueb95f1armZeypZmTfAgTJOhYNOdoxbTXmjDVGgleuIJcIwoQ1XTaulkcwJ3Yk9o66RTlpB2wmaXbweAHanVK9PP7vLc9pfB75fUQ
ContentType Conference Proceeding
DBID 6IE
6IH
CBEJK
RIE
RIO
DOI 10.1109/MWSCAS.1998.759514
DatabaseName IEEE Electronic Library (IEL) Conference Proceedings
IEEE Proceedings Order Plan (POP) 1998-present by volume
IEEE Xplore All Conference Proceedings
IEEE Electronic Library (IEL)
IEEE Proceedings Order Plans (POP) 1998-present
DatabaseTitleList
Database_xml – sequence: 1
  dbid: RIE
  name: IEEE Electronic Library (IEL)
  url: https://ieeexplore.ieee.org/
  sourceTypes: Publisher
DeliveryMethod fulltext_linktorsrc
Discipline Computer Science
EndPage 398
ExternalDocumentID 759514
GroupedDBID 6IE
6IH
6IK
6IL
AAJGR
AAWTH
ACGHX
ALMA_UNASSIGNED_HOLDINGS
BEFXN
BFFAM
BGNUA
BKEBE
BPEOZ
CBEJK
OCL
RIB
RIC
RIE
RIL
RIO
ID FETCH-LOGICAL-i174t-2e5e14516deb7b45c91529a08e98db0c06a469a582397a74d69b6f41d27d7c613
IEDL.DBID RIE
ISBN 9780818689147
0818689145
ISICitedReferencesCount 0
ISICitedReferencesURI http://www.webofscience.com/api/gateway?GWVersion=2&SrcApp=Summon&SrcAuth=ProQuest&DestLinkType=CitingArticles&DestApp=WOS_CPL&KeyUT=000079563200090&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
IngestDate Tue Aug 26 17:57:35 EDT 2025
IsPeerReviewed false
IsScholarly true
Language English
LinkModel DirectLink
MergedId FETCHMERGED-LOGICAL-i174t-2e5e14516deb7b45c91529a08e98db0c06a469a582397a74d69b6f41d27d7c613
PageCount 4
ParticipantIDs ieee_primary_759514
PublicationCentury 1900
PublicationDate 19980000
PublicationDateYYYYMMDD 1998-01-01
PublicationDate_xml – year: 1998
  text: 19980000
PublicationDecade 1990
PublicationTitle Circuits and Systems; Proceedings: Midwest Symposium on Circuits and Systems
PublicationTitleAbbrev MWSCAS
PublicationYear 1998
Publisher IEEE
Publisher_xml – name: IEEE
SSID ssj0000452003
Score 1.419605
Snippet We propose an algorithm driven architecture design for a lossless image scheme. The proposed architecture uses the spatial parallelism present in the...
SourceID ieee
SourceType Publisher
StartPage 395
SubjectTerms Algorithm design and analysis
Compression algorithms
Computational complexity
Computer architecture
Computer science
Hardware
Image coding
Parallel architectures
Systems engineering and theory
Transform coding
Title An algorithm driven architecture for a lossless image compression scheme based on multiplicative autoregressive models
URI https://ieeexplore.ieee.org/document/759514
WOSCitedRecordID wos000079563200090&url=https%3A%2F%2Fcvtisr.summon.serialssolutions.com%2F%23%21%2Fsearch%3Fho%3Df%26include.ft.matches%3Dt%26l%3Dnull%26q%3D
hasFullText 1
inHoldings 1
isFullTextHit
isPrint
link http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NT8JAEN0I8eAJRYzf2YPXQrt0u90jIRIvEhI0ciP7MWgTKKYUfr-z24KaePHW6aFpNrsz82bnvSHkQYfAVcpUwCMjgrhvTaBV1A8SbhGzMGuSeOGHTYjxOJ3N5KTW2fZcGADwzWfQdY_-Lt-uzdaVynqCYz4QN0hDCFFRtQ7lFKcMjhvUKzw6BXgZxbzW19nbYs-ZCWXv-W06HEwdVS_tVl_9NV3FB5dR61-_dUo63yQ9OjmEnzNyBHmbtPZTGmh9aM_JbpBTtXxfF1n5saK2cO6N_rw_oJi3UkWXGC6X6PdotkIfQ12vedUjm1NEwLAC6iKepWjXXYi-3LcDqpwOAnjg7kw_XGfTIa-jx5fhU1BPWwgyRCVlwICDH9trQQsdcyMxtEsVpiBTq0MTJgqhtOIpwxRGidgmUieLOLJMWGEwK7ggzXydwyWhyt11Ak_A6bGFbKGZ0KJv0fFGEcIndkXabhXnn5WgxrxawOs_396Qk4oG6Koet6RZFlu4I8dmV2ab4t5vgi_h_bEs
linkProvider IEEE
linkToHtml http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NT8JAEN0omugJRYzf7sFroV12u-2REIlGICRg5Eb2Y9AmUEwp_H53twU18eKt00PTbHZn5s3Oe4PQg_SBiYgIjwWKe7SllSdF0PJCpg1mIVqFdOaGTfDBIJpM4mGps-24MADgms-gYR_dXb5eqrUtlTU5M_kA3UcHjFISFGStXUHFaoObLeo0Hq0GfBxQVirsbG2-Zc34cbP_Nuq0R5asFzWK7_6ar-LCS7f6rx87QfVvmh4e7gLQKdqDtIaq2zkNuDy2Z2jTTrGYvy-zJP9YYJ1ZB4d_3iBgk7ligecmYM6N58PJwngZbLvNiy7ZFBsMDAvANuZpbOyyD9EV_DaAhVVCAAfdrenG66zq6LX7OO48eeW8BS8xuCT3CDBwg3s1SC4pU7EJ7rHwI4gjLX3lh8KAacEiYpIYwakOYxnOaKAJ11yZvOAcVdJlChcIC3vbCSwEq8jmk5kkXPKWNq43CAyAIpeoZldx-llIakyLBbz68-09Onoa93vT3vPg5RodF6RAWwO5QZU8W8MtOlSbPFlld25DfAFF6LRz
openUrl ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=Circuits+and+Systems%3B+Proceedings%3A+Midwest+Symposium+on+Circuits+and+Systems&rft.atitle=An+algorithm+driven+architecture+for+a+lossless+image+compression+scheme+based+on+multiplicative+autoregressive+models&rft.au=Chande%2C+S.B.&rft.au=Das%2C+M.&rft.au=Ganesan%2C+S.&rft.date=1998-01-01&rft.pub=IEEE&rft.isbn=9780818689147&rft.spage=395&rft.epage=398&rft_id=info:doi/10.1109%2FMWSCAS.1998.759514&rft.externalDocID=759514
thumbnail_l http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780818689147/lc.gif&client=summon&freeimage=true
thumbnail_m http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780818689147/mc.gif&client=summon&freeimage=true
thumbnail_s http://covers-cdn.summon.serialssolutions.com/index.aspx?isbn=9780818689147/sc.gif&client=summon&freeimage=true